Test Device and Imaging Device Including the Same
    14.
    发明申请
    Test Device and Imaging Device Including the Same 有权
    包括其的测试设备和成像设备

    公开(公告)号:US20160116578A1

    公开(公告)日:2016-04-28

    申请号:US14883753

    申请日:2015-10-15

    Abstract: A test device includes a plurality of transceivers that respectively transmit a wave to a test target point of a test object, respectively receive a wave reflected, scattered, or refracted from the test object, and respectively output a signal generated in response to the received wave; a combiner that combines the plurality of received signals generated by the plurality of transceivers; and a plurality of switches that are opened or closed to transfer the plurality of received signals to the combiner or block the plurality of received signals from being transferred to the combiner.

    Abstract translation: 测试装置包括多个收发器,其分别将测试对象的波发送到测试对象点,分别接收从测试对象反射,散射或折射的波,并且分别输出响应于所接收的波产生的信号 ; 组合器,其组合由所述多个收发器产生的所述多个接收信号; 以及多个开关,其被打开或关闭以将所述多个接收到的信号传送到所述组合器或阻止所述多个接收信号被传送到所述组合器。

    Memory, memory system, and error checking and correcting method for memory
    15.
    发明授权
    Memory, memory system, and error checking and correcting method for memory 有权
    内存,内存系统和内存的错误检查和纠正方法

    公开(公告)号:US09136872B2

    公开(公告)日:2015-09-15

    申请号:US13648421

    申请日:2012-10-10

    CPC classification number: H03M13/05 H03M13/1102 H03M13/356 H03M13/3707

    Abstract: A memory system includes an error checking and correction (ECC) engine configured to perform error checking and correction of data temporarily stored in a first memory array and data read out from the first memory array according to a first method, and perform error checking and correction of data stored in a second memory array after read out from the first memory array and data read out from the second memory array according to a second method, wherein the first method and the second method are selected in response to a control signal having at least a first logic level, and the second method checks and corrects data errors occurring at a higher rate compared the first method.

    Abstract translation: 存储器系统包括错误检查和校正(ECC)引擎,其被配置为根据第一方法执行临时存储在第一存储器阵列中的数据的错误校验和校正以及从第一存储器阵列读出的数据,并执行错误校验和校正 根据第二方法从第一存储器阵列读出并从第二存储器阵列读出的数据中存储在第二存储器阵列中的数据,其中响应于至少具有至少一个控制信号的控制信号选择第一方法和第二方法 第一种逻辑级别,第二种方法检查和纠正以比较第一种方法更高速率发生的数据错误。

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