公开(公告)号：US20210377095A1

公开(公告)日：2021-12-02

申请号：US17064598

申请日：2020-10-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Elina NAYEBI ,  Pranav DAYAL ,  Kee-Bong SONG ,  Siu-Chuang Ivan LU ,  Sang Won SON

IPC: H04L27/36 ,  H04L27/38 ,  H04L27/20 ,  H04L27/26 ,  H04L27/148

Abstract: A method of compensating for IQ mismatch (IQMM) in a transceiver may include sending first and second signals from a transmit path through a loopback path, using a phase shifter to introduce a phase shift in at least one of the first and second signals, to obtain first and second signals received by a receive path, using the first and second signals received by the receive path to obtain joint estimates of transmit and receive IQMM, at least in part, by estimating the phase shift, and compensating for IQMM using the estimates of IQMM. Using the first and second signals received by the receive path to obtain estimates of the IQMM may include processing the first and second signals received by the receive path as a function of one or more frequency-dependent IQMM parameters.

公开(公告)号：US20170264242A1

公开(公告)日：2017-09-14

申请号：US15608254

申请日：2017-05-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Venumadhav BHAGAVATULA ,  Sriramkumar VENUGOPALAN ,  Siddharth SETH ,  Siuchuang Ivan LU ,  Sang Won SON

IPC: H03D7/12 ,  H03K17/693 ,  H03H11/32 ,  H03K17/691 ,  H03D7/14 ,  H03H11/28

CPC classification number: H03D7/125 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1466 ,  H03H11/28 ,  H03H11/32 ,  H03K17/691 ,  H03K17/693

Abstract: An apparatus and method are provided. The apparatus includes a multiplexer, including first, second, and third inputs, and an output; a first transistor, including a gate connected to the first multiplexer, and first and second terminals; a first variable capacitor, including a first terminal connected to the first transistor, a second terminal, and an input; a first inductor, including a first terminal connected to the first transistor, and a second terminal connected to the second terminal of the first variable capacitor; a second transistor, including a gate connected to the output of the first multiplexer, a first terminal, and a second terminal connected to the second terminal of the first inductor; a second inductor mutually coupled to the first inductor, including a first and second terminals; and a balun-bias switch, including first, second, and third inputs, and an output connected to the second terminal of the second inductor.