公开(公告)号：US20160072447A1

公开(公告)日：2016-03-10

申请号：US14819088

申请日：2015-08-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Siddharth SETH ,  Sang Won SON ,  Dae Hyun KWON ,  Sriramkumar VENUGOPALAN ,  Thomas CHO

IPC: H03F1/02 ,  H03F3/24 ,  H03F3/45 ,  H03F3/193

CPC classification number: H03F1/0233 ,  H03F1/0222 ,  H03F3/193 ,  H03F3/245 ,  H03F3/45179 ,  H03F3/45183 ,  H03F3/45197 ,  H03F2200/102 ,  H03F2200/153 ,  H03F2200/381 ,  H03F2200/451 ,  H03F2200/462 ,  H03F2200/546 ,  H03F2200/91 ,  H03F2203/30036 ,  H03F2203/45112 ,  H04B1/04 ,  H04B2001/0416

Abstract: A dynamically biased baseband current amplifier is provided. The dynamically biased baseband current amplifier includes an input interface; a controller; a variable resistor network; an amplifier stage; a hybrid differential envelope detector and full-wave rectifier; a transconductor; a first variable transistor; a second variable transistor; a third variable transistor; and a fourth variable transistor.

Abstract translation: 提供了一种动态偏置的基带电流放大器。 动态偏置的基带电流放大器包括输入接口; 控制器 可变电阻网络; 放大器级; 混合差分包络检波器和全波整流器; 跨导体 第一可变晶体管; 第二可变晶体管; 第三可变晶体管; 和第四可变晶体管。

公开(公告)号：US20170264242A1

公开(公告)日：2017-09-14

申请号：US15608254

申请日：2017-05-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Venumadhav BHAGAVATULA ,  Sriramkumar VENUGOPALAN ,  Siddharth SETH ,  Siuchuang Ivan LU ,  Sang Won SON

IPC: H03D7/12 ,  H03K17/693 ,  H03H11/32 ,  H03K17/691 ,  H03D7/14 ,  H03H11/28

CPC classification number: H03D7/125 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1466 ,  H03H11/28 ,  H03H11/32 ,  H03K17/691 ,  H03K17/693

Abstract: An apparatus and method are provided. The apparatus includes a multiplexer, including first, second, and third inputs, and an output; a first transistor, including a gate connected to the first multiplexer, and first and second terminals; a first variable capacitor, including a first terminal connected to the first transistor, a second terminal, and an input; a first inductor, including a first terminal connected to the first transistor, and a second terminal connected to the second terminal of the first variable capacitor; a second transistor, including a gate connected to the output of the first multiplexer, a first terminal, and a second terminal connected to the second terminal of the first inductor; a second inductor mutually coupled to the first inductor, including a first and second terminals; and a balun-bias switch, including first, second, and third inputs, and an output connected to the second terminal of the second inductor.

公开(公告)号：US20170222607A1

公开(公告)日：2017-08-03

申请号：US15137349

申请日：2016-04-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Siddharth SETH ,  Venumadhav BHAGAVATULA ,  Ivan LU ,  Sang Won SON

IPC: H03F3/24 ,  H04W72/12 ,  H04B1/04 ,  H03F3/19 ,  H04L5/22

CPC classification number: H03F3/245 ,  H03F3/19 ,  H03F3/217 ,  H03F3/24 ,  H03F2200/451 ,  H04B1/0475 ,  H04B2001/0408 ,  H04L5/22 ,  H04W72/1263

Abstract: Apparatuses, systems, and methods for a digital power amplifier (DPA) to generate a monotonic and linear ramp-up and ramp-down for a time division multiple access (TDMA) slot transmission are described. In one aspect, a monotonic and linear amplitude-to-control input code relationship model is generated for the DPA and stored. When the DPA needs to generate a ramp-up or ramp-down, the stored monotonic and linear amplitude-to-control input code relationship model is used to shape the input control code before it is input into the DPA. A new monotonic and linear amplitude-to-control input code relationship model may be generated and stored if the operating conditions change. The apparatuses, systems, and methods described herein may be applied to a multi-standard broadband modem chip capable of 2G transmission.

公开(公告)号：US20170077904A1

公开(公告)日：2017-03-16

申请号：US15065433

申请日：2016-03-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Venumadhav BHAGAVATULA ,  Sriramkumar VENUGOPALAN ,  Siddharth SETH ,  Siuchuang Ivan LU ,  Sang Won SON

IPC: H03H11/28 ,  H03D7/12 ,  H03K17/693 ,  H03H11/32 ,  H03K17/691

CPC classification number: H03D7/125 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1466 ,  H03H11/28 ,  H03H11/32 ,  H03K17/691 ,  H03K17/693

Abstract: An apparatus and method are provided. The apparatus includes a multiplexer, including a first input, a second input, a third input, and an output; a first transistor, including a gate, a first terminal, and a second terminal; a first variable capacitor, including a first terminal, a second terminal, and an input; a first inductor, including a first terminal and a second terminal; a second transistor, including a gate, a first terminal, and a second terminal; a second inductor mutually coupled to the first inductor, including a first terminal and a second terminal; a balun-bias switch, including a first input, a second input, a third input, and an output; a second capacitor, including a first terminal, and a second terminal; and a port-switch, including a first input, a second input, a third input, and an output.

Abstract translation: 提供了一种装置和方法。 该装置包括多路复用器，包括第一输入，第二输入，第三输入和输出; 第一晶体管，包括栅极，第一端子和第二端子; 第一可变电容器，包括第一端子，第二端子和输入端; 第一电感器，包括第一端子和第二端子; 第二晶体管，包括栅极，第一端子和第二端子; 第二电感器，其相互耦合到所述第一电感器，包括第一端子和第二端子; 平衡偏压开关，包括第一输入，第二输入，第三输入和输出; 包括第一端子和第二端子的第二电容器; 以及端口开关，包括第一输入端，第二输入端，第三输入端和输出端。

公开(公告)号：US20160072481A1

公开(公告)日：2016-03-10

申请号：US14821270

申请日：2015-08-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Siddharth SETH ,  Sang Won SON ,  Thomas CHO

IPC: H03K3/012 ,  H02M7/217

CPC classification number: H03K3/012 ,  G01R19/04 ,  H02M7/217 ,  H03K5/1532

Abstract: A first and second hybrid envelope detector and full-wave rectifier is provided. The first hybrid envelope detector and full-wave rectifier includes a first P-channel Field Effect Transistor (PFET); a second PFET; a first N-channel Field Effect Transistor (NFET); a second NFET; a third NFET; a fourth NFET; a fifth NFET; a controller; a variable transistor; and a variable capacitor. The second hybrid envelope detector and full-wave rectifier includes a first N-channel Field Effect Transistor (NFET); a second NFET; a first P-channel Field Effect Transistor (PFET); a second PFET; a third PFET; a fourth PFET; a fifth PFET; a controller; a variable transistor; and a variable capacitor.

Abstract translation: 提供第一和第二混合包络检测器和全波整流器。 第一混合包络检波器和全波整流器包括第一P沟道场效应晶体管（PFET）; 第二个PFET; 第一N沟道场效应晶体管（NFET）; 第二个NFET; 第三个NFET; 第四个NFET; 第五个NFET; 控制器 可变晶体管; 和可变电容器。 第二混合包络检测器和全波整流器包括第一N沟道场效应晶体管（NFET）; 第二个NFET; 第一P沟道场效应晶体管（PFET）; 第二个PFET; 第三个PFET; 第四个PFET; 第五个PFET; 控制器 可变晶体管; 和可变电容器。