Abstract:
A radio frequency integrated circuit (RFIC) and method of communication are provided. The RFIC includes phased-locked loop (PLL) and data stream circuitry and a plurality of tiles in communication with the PLL and data stream circuitry. The plurality of tiles includes comprising at least one tile for each frequency band of the RFIC. The plurality of tiles are configured to communicate a data stream signal between tiles in a cascading sequence. Each tile of the plurality of tiles includes a plurality of up/down conversion mixers for converting the data stream signal between an intermediate frequency (IF) and a radio frequency (RF). Each tile also includes a plurality of front end (FE) elements, each in communication with a corresponding antenna and an up/down conversion mixer of the plurality of up/down conversion mixers.
Abstract:
An electronic circuit and method are provided. The electronic circuit includes an in-phase(I)-quadrature(Q) amplifier including an I cascode branch and a Q cascode branch, the IQ amplifier configured to receive a differential input and control signals, control, based on the control signals, gate voltages in the I cascode branch and gate voltages in the Q cascode branch, generate an I output signal with the I cascode branch, and generate a Q output signal with the Q cascode branch, and a quadrature coupler configured to perform quadrature summation of the I output signal and the Q output signal and generate a final phase shifted output.
Abstract:
Apparatuses, systems, and methods for a digital power amplifier (DPA) to generate a monotonic and linear ramp-up and ramp-down for a time division multiple access (TDMA) slot transmission are described. In one aspect, a monotonic and linear amplitude-to-control input code relationship model is generated for the DPA and stored. When the DPA needs to generate a ramp-up or ramp-down, the stored monotonic and linear amplitude-to-control input code relationship model is used to shape the input control code before it is input into the DPA. A new monotonic and linear amplitude-to-control input code relationship model may be generated and stored if the operating conditions change. The apparatuses, systems, and methods described herein may be applied to a multi-standard broadband modem chip capable of 2G transmission.
Abstract:
An amplifier circuit is provided. The amplifier circuit includes an amplifier stage; a plurality of variable transistors connected to the amplifier stage; a transconductor connected to at least one of the plurality of variable transistors; and a hybrid differential envelope detector and full-wave rectifier connected to the transconductor.
Abstract:
A band-switching network includes a dual-band balun and a switch network. The dual-band balun includes a first output and a second output. The switch network includes a first switch and a second switch in which an input to the first switch is coupled to the first output and an input to the second switch is coupled to the second balanced output. The dual-band balun further includes a primary coil, a first secondary coil and a second secondary coil in which the first secondary coil is coupled to the first balanced output and the second secondary coil is coupled to the second balanced output. In one embodiment, the primary coil and the first secondary coil are coupled by a first coupling factor k1, and the primary coil and the second secondary coil are coupled by a second coupling factor k2 that is different from the first coupling factor k1.
Abstract:
A band-switching network includes a dual-band balun and a switch network. The dual-band balun includes a first output and a second output. The switch network includes a first switch and a second switch in which an input to the first switch is coupled to the first output and an input to the second switch is coupled to the second balanced output. The dual-band balun further includes a primary coil, a first secondary coil and a second secondary coil in which the first secondary coil is coupled to the first balanced output and the second secondary coil is coupled to the second balanced output. In one embodiment, the primary coil and the first secondary coil are coupled by a first coupling factor k1, and the primary coil and the second secondary coil are coupled by a second coupling factor k2 that is different from the first coupling factor k1.
Abstract:
A dynamically biased baseband current amplifier is provided. The dynamically biased baseband current amplifier includes an input interface; a controller; a variable resistor network; an amplifier stage; a hybrid differential envelope detector and full-wave rectifier; a transconductor; a first variable transistor; a second variable transistor; a third variable transistor; and a fourth variable transistor.
Abstract:
An apparatus and method are provided. The apparatus includes a multiplexer, including a first input, a second input, a third input, and an output; a first transistor, including a gate, a first terminal, and a second terminal; a first variable capacitor, including a first terminal, a second terminal, and an input; a first inductor, including a first terminal and a second terminal; a second transistor, including a gate, a first terminal, and a second terminal; a second inductor mutually coupled to the first inductor, including a first terminal and a second terminal; a balun-bias switch, including a first input, a second input, a third input, and an output; a second capacitor, including a first terminal, and a second terminal; and a port-switch, including a first input, a second input, a third input, and an output.
Abstract:
A first and second hybrid envelope detector and full-wave rectifier is provided. The first hybrid envelope detector and full-wave rectifier includes a first P-channel Field Effect Transistor (PFET); a second PFET; a first N-channel Field Effect Transistor (NFET); a second NFET; a third NFET; a fourth NFET; a fifth NFET; a controller; a variable transistor; and a variable capacitor. The second hybrid envelope detector and full-wave rectifier includes a first N-channel Field Effect Transistor (NFET); a second NFET; a first P-channel Field Effect Transistor (PFET); a second PFET; a third PFET; a fourth PFET; a fifth PFET; a controller; a variable transistor; and a variable capacitor.
Abstract:
A method of compensating for IQ mismatch (IQMM) in a transceiver may include sending first and second signals from a transmit path through a loopback path, using a phase shifter to introduce a phase shift in at least one of the first and second signals, to obtain first and second signals received by a receive path, using the first and second signals received by the receive path to obtain joint estimates of transmit and receive IQMM, at least in part, by estimating the phase shift, and compensating for IQMM using the estimates of IQMM. Using the first and second signals received by the receive path to obtain estimates of the IQMM may include processing the first and second signals received by the receive path as a function of one or more frequency-dependent IQMM parameters.