公开(公告)号：US5789303A

公开(公告)日：1998-08-04

申请号：US680286

申请日：1996-07-11

申请人： Pak K. Leung ,  Ismail T. Emesh

发明人： Pak K. Leung ,  Ismail T. Emesh

IPC分类号： H01L21/8247 ,  H01L21/02 ,  H01L21/768 ,  H01L21/77 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/00 ,  H01L27/04 ,  H01L27/10 ,  H01L27/105 ,  H01L27/108 ,  H01L29/788 ,  H01L29/792 ,  H01L21/20

CPC分类号： H01L28/55 ,  H01L21/76895 ,  H01L28/60 ,  Y10S148/014

摘要： A capacitor structure and method of forming a capacitor structure for an integrated circuit is provided. The capacitor structure, comprising a bottom electrode, capacitor dielectric and top electrode, is formed on a passivation layer overlying the interconnect metallization. The capacitor electrodes are interconnected to the underlying integrated circuit from underneath, through conductive vias, to the underlying interconnect metallization. The method provides for adding capacitors to an otherwise completed and passivated integrated circuit. The structure is particularly applicable for ferroelectric capacitors. The passivation layer acts as a barrier layer for a ferroelectric dielectric. Large area on-chip capacitors may added without affecting the interconnect routing or packing density of the underlying devices, and may be added almost independently of the process technology used formation of the underlying integrated circuit.

摘要翻译： 提供一种形成集成电路的电容器结构的电容器结构和方法。 包括底部电极，电容器电介质和顶部电极的电容器结构形成在覆盖互连金属化的钝化层上。 电容器电极从下面通过导电通孔连接到下面的集成电路到下面的互连金属化。 该方法提供了将电容器添加到另外完成和钝化的集成电路中。 该结构特别适用于铁电电容器。 钝化层用作铁电介质的阻挡层。 可以添加大面积的片上电容器，而不影响底层器件的互连布线或封装密度，并且可以几乎独立于使用底层集成电路的形成工艺加工。

公开(公告)号：US5612560A

公开(公告)日：1997-03-18

申请号：US551264

申请日：1995-10-31

申请人： Vasanta Chivukula ,  Pak K. Leung

发明人： Vasanta Chivukula ,  Pak K. Leung

IPC分类号： H01L21/02 ,  H01L27/108

CPC分类号： H01L28/60 ,  H01L28/55 ,  H01L28/75

摘要： An improved electrode structure compatible with ferroelectric capacitor dielectrics is provided. In particular, a multilayer electrode having improved adhesion to ferroelectric materials such as PZT is formed comprising a first layer of a noble metal, a second layer of another metal and a thicker layer of the noble metal, which are annealed to cause controlled interdiffusion of the layers forming a mixed metal surface layer having a rough interface with the dielectric layer. For example, the first two layers comprise relatively thin .about.200.ANG. layers of Pt and Ti, and then a thicker layer of the main, first, electrode material is deposited on top. Non- uniform interdiffusion of the layers during annealing causes intermixing of the Pt and Ti layers at the interfaces forming a Pt/Ti alloy having a rough surface. The rough surface, and particularly hillocks formed at the interface, penetrate into the ferroelectric films, and anchor the electrode material to the dielectric. Improved adhesion of the conductive electrode material improves integrity of this interface during subsequent processing.

摘要翻译： 提供了与铁电电容器电介质相容的改进的电极结构。 特别地，形成了具有对诸如PZT之类的铁电材料的附着力提高的多层电极，其包含贵金属的第一层，另一金属的第二层和贵金属的较厚层，其被退火以引起控制的相互扩散 形成与介电层具有粗糙界面的混合金属表面层的层。 例如，前两层包括相对较薄的Pt和Ti的差的200Gn层，然后将主要的第一电极材料的较厚层沉积在顶部。 在退火过程中层的不均匀相互扩散导致在形成具有粗糙表面的Pt / Ti合金的界面处Pt和Ti层之间的混合。 粗糙表面，特别是在界面处形成的小丘，渗透到铁电体膜中，并将电极材料锚固到电介质上。 改进的导电电极材料的附着力在随后的处理过程中改善了该界面的完整性。