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    Global pool of garbage collection units (GCUs) in a shared non-volatile memory device
    11.
    发明授权
    Global pool of garbage collection units (GCUs) in a shared non-volatile memory device 有权

    公开(公告)号：US10552086B2

    公开(公告)日：2020-02-04

    申请号：US16021870

    申请日：2018-06-28

    Applicant: Seagate Technology LLC

    Inventor： David W. Claude ,  Steven S. Williams ,  Stacey Secatch

    IPC: G06F12/00 ,  G06F3/06 ,  G06F12/02

    Abstract: Apparatus and method for managing shared resources in a data storage device such as a solid-state drive (SSD). In some embodiments, a non-volatile memory (NVM) has a population of semiconductor memory dies which are divided into die sets for different users. Each die set includes user garbage collection units (GCUs) for storage of user data blocks by the associated user and overprovisioned global GCUs to store user data blocks from the users of the other die sets. When an imbalance condition exists such that the workload traffic level of a first die set exceeds a workload traffic level of a second die set, at least one host I/O command for the first die set is offloaded for servicing using a selected global GCU of the second die set. The offloaded data may be subsequently transferred to the first die set after the imbalance condition is resolved.

    BACKGROUND READS TO CONDITION PROGRAMMED SEMICONDUCTOR MEMORY CELLS
    14.
    发明申请
    BACKGROUND READS TO CONDITION PROGRAMMED SEMICONDUCTOR MEMORY CELLS 审中-公开

    公开(公告)号：US20180225164A1

    公开(公告)日：2018-08-09

    申请号：US15498595

    申请日：2017-04-27

    Applicant: Seagate Technology, LLC

    Inventor： Antoine Khoueir ,  Stacey Secatch ,  Kevin Gomez ,  Ryan Goss

    IPC: G06F11/07 ,  G11C16/16 ,  G11C16/34 ,  G11C16/26

    CPC classification number: G06F11/076 ,  G06F11/073 ,  G11C16/16 ,  G11C16/26 ,  G11C16/3459

    Abstract: Method and apparatus for managing data in a semiconductor memory, such as but not limited to a three dimensional (3D) NAND flash memory array. In some embodiments, the memory has non-volatile memory cells arranged into addressable blocks. Each memory cell is configured to store multiple bits. A program/read control circuit programs data sets to and reads data sets from the memory cells in the addressable blocks to service a sequence of host access commands. The circuit concurrently performs background reads in conjunction with the servicing of the host access commands. The background reads result in the reading of a different data set from each of the addressable blocks over each of a succession of time intervals of selected duration. The background reads condition the memory cells prior to a first read operation associated with the host access commands.

    OPTIMIZATION OF REFERENCE VOLTAGES IN A NON-VOLATILE MEMORY (NVM)
    18.
    发明申请
    OPTIMIZATION OF REFERENCE VOLTAGES IN A NON-VOLATILE MEMORY (NVM) 有权

    公开(公告)号：US20220180932A1

    公开(公告)日：2022-06-09

    申请号：US17541973

    申请日：2021-12-03

    Applicant: Seagate Technology LLC

    Inventor： Stacey Secatch ,  David W. Claude ,  Jonathan Henze

    IPC: G11C16/10 ,  G11C16/14 ,  G11C16/26 ,  G11C16/30 ,  G11C29/44

    Abstract: Method and apparatus for managing data in a non-volatile memory (NVM) of a storage device, such as a solid-state drive (SSD). Data are stored to and retrieved from a group of memory cells in the NVM using a controller circuit. The data are retrieved using a first set of read voltages which are applied to the respective memory cells. The first set of read voltages are accumulated into a history distribution, which is evaluated to arrive at a second set of read voltages based upon characteristics of the history distribution. A calibration operation is performed on the memory cells using the second set of read voltages as a starting point. A final, third set of read voltages is obtained during the calibration operation to provide error rate performance at an acceptable level. The third set of read voltages are thereafter used for subsequent read operations.

    SEMICONDUCTOR DIE FAILURE RECOVERY IN A DATA STORAGE DEVICE
    19.
    发明申请
    SEMICONDUCTOR DIE FAILURE RECOVERY IN A DATA STORAGE DEVICE 有权

    公开(公告)号：US20220138065A1

    公开(公告)日：2022-05-05

    申请号：US17516072

    申请日：2021-11-01

    Applicant: Seagate Technology LLC

    Inventor： Stacey Secatch ,  Stephen H. Perlmutter

    IPC: G06F11/20 ,  G06F11/10 ,  G06F3/06

    Abstract: Apparatus and method for a die kill and recovery sequence for a non-volatile memory (NVM). Data are stored in the NVM as data sets in garbage collection units (GCUs) that span multiple semiconductor dies. A die failure management circuit is configured to detect a die failure event associated with a selected die, and to generate a recovery strategy to accommodate the detected die failure event by selecting recovery actions to be taken in a selected sequence to maintain a current level of data transfer performance with a client device. The selected recovery actions are carried out in the selected sequence to transfer at least a portion of the user data stored in the selected die to a new replacement die, after which the selected die is decommissioned from further use. The NVM may be a flash memory of a solid-state drive (SSD).

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