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公开(公告)号:US20240134605A1
公开(公告)日:2024-04-25
申请号:US18278451
申请日:2022-02-24
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Yoshiyuki KUROKAWA , Hiromichi GODO , Kazuki TSUDA , Satoru OHSHITA , Hidefumi RIKIMARU
IPC: G06F7/523 , G06F7/50 , G09G3/3208 , G11C11/405 , H10B12/00 , H10K59/121
CPC classification number: G06F7/523 , G06F7/50 , G09G3/3208 , G11C11/405 , H10B12/00 , H10K59/1213 , H10K59/1216
Abstract: A semiconductor device with a novel structure is provided. The semiconductor device includes a cell array performing a product-sum operation of a first layer and a product-sum operation of a second layer in an artificial neural network, a first circuit from which first data is input to the cell array, and a second circuit to which second data is output from the cell array. The cell array includes a plurality of cells. The cell array includes a first region and a second region. In a first period, the first region is supplied with the t-th (t is a natural number greater than or equal to 2) first data from the first circuit and outputs the t-th second data according to the product-sum operation of the first layer to the second circuit. In the first period, the second region is supplied with the (t+1)-th first data from the first circuit and outputs the (t+1)-th second data according to the product-sum operation of the second layer to the first circuit.
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公开(公告)号:US20230369329A1
公开(公告)日:2023-11-16
申请号:US18142740
申请日:2023-05-03
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Yoshiyuki KUROKAWA , Satoru OHSHITA , Hidefumi RIKIMARU
IPC: H01L27/092 , H03M1/72
CPC classification number: H01L27/092 , H03M1/72
Abstract: A semiconductor device with low power consumption is provided. The semiconductor device includes a first layer and a second layer. The first layer includes a first cell and a first to a third circuit, and the second layer includes a second cell and a fourth and a fifth circuit. The first, second, and fourth circuits each have a function of converting digital data into analog current. The first cell calculates a product of a value from the first current and a value from the second circuit and inputs a calculation result into a third circuit as current. The third circuit generates analog current from the input current. The second cell calculates a product of a value from the third circuit and a value from the fourth circuit and inputs a calculation result into the fifth circuit as current. The fifth circuit generates analog current from the input current.
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公开(公告)号:US20250078895A1
公开(公告)日:2025-03-06
申请号:US18727223
申请日:2023-01-25
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Hidefumi RIKIMARU , Yoshiyuki KUROKAWA , Satoru OHSHITA
IPC: G11C11/405 , G11C11/4096 , G11C11/54 , H10B12/00
Abstract: An operation method of a semiconductor device that performs data writing and correction processing is provided. The operation method is for a semiconductor device including a control circuit, a first circuit, a second circuit, a wiring, a cell, and a converter circuit. In the operation method, first, the control circuit transmits, to the first circuit, a first signal corresponding to the value of first data. Next, the first circuit outputs, to the wiring, a first current with an amount corresponding to the first signal. Moreover, the cell retains a first potential corresponding to the amount of first current. Then, the cell makes a second current corresponding to the first potential flow from the wiring, and the converter circuit outputs a second signal corresponding to the amount of second current. Next, the second circuit obtains a difference value between a value corresponding to the second signal and the value of the first data. If the difference value is 0, the operation is terminated. If the difference value is not 0, the control circuit generates an update value obtained by adding the difference value to a value corresponding to the first signal previously transmitted. The first circuit obtains the first signal corresponding to the update value and outputs the updated first current to the cell.
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公开(公告)号:US20240234310A1
公开(公告)日:2024-07-11
申请号:US18560959
申请日:2022-05-13
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Yoshiyuki KUROKAWA , Hiromichi GODO , Kazuki TSUDA , Kouhei TOYOTAKA , Satoru OHSHITA , Hidefumi RIKIMARU , Hideki UOCHI
IPC: H01L23/528 , H01L29/24
CPC classification number: H01L23/528 , H01L29/24
Abstract: A novel semiconductor device is provided. In reservoir computing using an input layer, a reservoir layer, and an output layer, variation in threshold voltage between transistors is used as a weight used for product arithmetic processing. Two transistors are provided in one product arithmetic circuit and data u is supplied to gates of the two transistors. Drain current of each of the transistors is determined by the data u and the threshold voltage of the transistor. The difference between the drain currents corresponds to a product arithmetic result. The difference between the drain currents is converted into voltage to be output. A plurality of product arithmetic circuits are connected in parallel to form a product-sum arithmetic circuit.
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公开(公告)号:US20230353163A1
公开(公告)日:2023-11-02
申请号:US18018965
申请日:2021-07-26
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Takuro KANEMURA , Yoshiyuki KUROKAWA , Hiromichi GODO , Kazuki TSUDA , Satoru OHSHITA , Hidefumi RIKIMARU
IPC: G09G3/3233 , H03M1/46
CPC classification number: H03M1/46 , G09G3/3233 , H03K5/2472
Abstract: A novel semiconductor device is provided. An analog signal is converted into a digital signal using a comparison portion comparing two current values, a control portion, and a current output digital-analog conversion portion. The control portion has a function of generating a sign bit showing a magnitude relation between the two current values, a function of converting a difference between the two current values into a digital signal by successive approximation, and a function of outputting the sign bit and the digital signal.
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公开(公告)号:US20220293049A1
公开(公告)日:2022-09-15
申请号:US17686796
申请日:2022-03-04
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiromichi GODO , Yoshiyuki KUROKAWA , Kazuki TSUDA , Satoru OHSHITA , Hidefumi RIKIMARU
IPC: G09G3/3208 , H01L27/32
Abstract: A semiconductor device with a high driving speed is provided. The semiconductor device includes first to fourth cells, a converter circuit, and first to fourth wirings. The first and second cells make a first current and a second current each corresponding to the product of first data and second data flow in the first wiring and the second wiring, respectively. The third and fourth cells make base currents in the same amount flow in the first and second wirings. The converter circuit outputs, from an output terminal thereof, a voltage corresponding to the differential current between the sum of the first current and the base current flowing in the first wiring and the sum of the second current and the base current flowing in the second wiring.
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