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公开(公告)号：US07565478B2
公开(公告)日：2009-07-21
申请号：US11949618
申请日：2007-12-03
CPC分类号： G11C16/349 , G06F12/0246 , G06F2212/7205
摘要： A re-programmable non-volatile memory system, such as a flash EEPROM system, having its memory cells grouped into blocks of cells that are simultaneously erasable is operated to perform memory system housekeeping operations in the foreground during execution of a host command, wherein the housekeeping operations are unrelated to execution of the host command. Both one or more such housekeeping operations and execution of the host command are performed within a time budget established for executing that particular command. One such command is to write data being received to the memory. One such housekeeping operation is to level out the wear of the individual blocks that accumulates through repetitive erasing and re-programming.
摘要翻译： 操作一个可重新编程的非易失性存储器系统，例如闪存EEPROM系统，其具有分组为可同时擦除的单元块的存储器单元，以在主机命令的执行期间在前台执行存储器系统管理操作，其中， 内务管理操作与主机命令的执行无关。 在为执行该特定命令建立的时间预算内执行一个或多个此类内务处理操作和主机命令的执行。 一个这样的命令是将正在接收的数据写入存储器。 一个这样的内务处理操作是通过重复擦除和重新编程来平衡累积的各个块的磨损。
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公开(公告)号：US07366826B2
公开(公告)日：2008-04-29
申请号：US11192220
申请日：2005-07-27
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F2212/1032 , G06F2212/7203
摘要： Update data to a non-volatile memory may be recorded in at least two interleaving streams such as either into an update block or a scratch pad block depending on a predetermined condition. The scratch pad block is used to buffered update data that are ultimately destined for the update block. Synchronization information about the order recording of updates among the streams is saved with at least one of the streams. This will allow the most recently written version of data that may exist on multiple memory blocks to be identified. In one embodiment, the synchronization information is saved in a first block and is a write pointer that points to the next recording location in a second block. In another embodiment, the synchronization information is a time stamp.
摘要翻译： 根据预定条件，将数据更新到非易失性存储器可以记录在至少两个交织流中，诸如更新块或便笺块块中。 缓冲块块用于缓冲最终发往更新块的更新数据。 与流中的更新的顺序记录的同步信息与至少一个流一起被保存。 这将允许识别可能存在于多个内存块上的最新版本的数据。 在一个实施例中，同步信息被保存在第一块中，并且是指向第二块中的下一个记录位置的写指针。 在另一个实施例中，同步信息是时间戳。
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13.发明授权公开(公告)号：US08700840B2
公开(公告)日：2014-04-15
申请号：US12348895
申请日：2009-01-05
申请人： Alexander Paley , Sergey Anatolievich Gorobets , Eugene Zilberman , Alan David Bennett , Shai Traister , Andrew Tomlin , William S. Wu , Bum Suck So
发明人： Alexander Paley , Sergey Anatolievich Gorobets , Eugene Zilberman , Alan David Bennett , Shai Traister , Andrew Tomlin , William S. Wu , Bum Suck So
CPC分类号： G06F12/0866 , G06F12/0246 , G06F12/0804 , G06F2212/7203 , G06F2212/7204 , G11C11/5628 , G11C2211/5641 , Y02D10/13
摘要： A portion of a nonvolatile memory is partitioned from a main multi-level memory array to operate as a cache. The cache memory is configured to store at less capacity per memory cell and finer granularity of write units compared to the main memory. In a block-oriented memory architecture, the cache has multiple functions, not merely to improve access speed, but is an integral part of a sequential update block system. Decisions to archive data from the cache memory to the main memory depend on the attributes of the data to be archived, the state of the blocks in the main memory portion and the state of the blocks in the cache portion.
摘要翻译： 将非易失性存储器的一部分从主多层存储器阵列分区以作为高速缓存进行操作。 缓存存储器被配置为以比每个存储器单元更少的容量存储和与主存储器相比写入单元的更细粒度。 在面向块的存储器架构中，缓存具有多个功能，而不仅仅是提高访问速度，而是顺序更新块系统的组成部分。 将数据从高速缓冲存储器归档到主存储器的决定取决于要归档的数据的属性，主存储器部分中的块的状态和高速缓存部分中的块的状态。
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14.发明授权公开(公告)号：US08244960B2
公开(公告)日：2012-08-14
申请号：US12348899
申请日：2009-01-05
申请人： Alexander Paley , Sergey Anatolievich Gorobets , Eugene Zilberman , Alan David Bennett , Shai Traister , Andrew Tomlin , William S. Wu , Bum Suck So
发明人： Alexander Paley , Sergey Anatolievich Gorobets , Eugene Zilberman , Alan David Bennett , Shai Traister , Andrew Tomlin , William S. Wu , Bum Suck So
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F12/0804 , G06F12/0866 , G06F2212/224 , G06F2212/7203 , G06F2212/7204
摘要： A portion of a nonvolatile memory is partitioned from a main multi-level memory array to operate as a cache. The cache memory is configured to store at less capacity per memory cell and finer granularity of write units compared to the main memory. In a block-oriented memory architecture, the cache has multiple functions, not merely to improve access speed, but is an integral part of a sequential update block system. The cache memory has a capacity dynamically increased by allocation of blocks from the main memory in response to a demand to increase the capacity. Preferably, a block with an endurance count higher than average is allocated. The logical addresses of data are partitioned into zones to limit the size of the indices for the cache.
摘要翻译： 将非易失性存储器的一部分从主多层存储器阵列分区以作为高速缓存进行操作。 缓存存储器被配置为以比每个存储器单元更少的容量存储和与主存储器相比写入单元的更细粒度。 在面向块的存储器架构中，缓存具有多个功能，而不仅仅是提高访问速度，而是顺序更新块系统的组成部分。 响应于增加容量的需求，高速缓冲存储器具有通过从主存储器分配块而动态增加的容量。 优选地，分配耐力计数高于平均值的块。 数据的逻辑地址被划分为区域以限制高速缓存的索引的大小。
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公开(公告)号：US08239643B2
公开(公告)日：2012-08-07
申请号：US13244178
申请日：2011-09-23
IPC分类号： G06F12/00
CPC分类号： G06F11/1666 , G06F11/1072 , G06F11/141 , G06F11/1415 , G06F11/1658 , G06F12/0246 , G06F2212/7202 , G06F2212/7203 , G06F2212/7205 , G06F2212/7208 , G11C11/5621 , G11C11/5628 , G11C16/102 , G11C16/105 , G11C16/20 , G11C29/00 , G11C29/76 , G11C2211/5641
摘要： In a nonvolatile memory with block management system, critical data such as control data for the block management system is maintained in duplicates. Various methods are described for robustly writing and reading two copies of critical data in multi-state memory. In another aspect of the invention, a preemptive garbage collection on memory block containing control data avoids an undesirable situation where a large number of such memory blocks need be garbage collected at the same time.
摘要翻译： 在具有块管理系统的非易失性存储器中，诸如块管理系统的控制数据的关键数据保持重复。 描述了用于在多状态存储器中强制写入和读取关键数据的两个副本的各种方法。 在本发明的另一方面，在包含控制数据的存储器块上的抢先垃圾收集避免了不希望的情况，其中大量的这种存储块需要同时被垃圾收集。
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公开(公告)号：US08151035B2
公开(公告)日：2012-04-03
申请号：US12189396
申请日：2008-08-11
IPC分类号： G06F12/00
CPC分类号： G06F3/064 , G06F3/0616 , G06F3/0679 , G06F12/0246 , G06F2212/7203 , G11C16/102
摘要： In a memory that is programmable page by page and each page having multiple sectors that are once-programmable, even if successive writes are sequential, the data recorded to an update block may be fragmented and non-sequential. Instead of recording update data to an update block, the data is being recorded in at least two interleaving streams. When a full page of data is available, it is recorded to the update block. Otherwise, it is temporarily recorded to the scratch pad block until a full page of data becomes available to be transferred to the update block. Preferably, a pipeline operation allows the recording to the update block to be set up as soon as the host write command indicates a full page could be written. If the actual write data is incomplete due to interruptions, the setup will be canceled and recording is made to the scratch pad block instead.
摘要翻译： 在逐页可编程的存储器中，每页具有一次可编程的多个扇区，即使顺序写入是顺序的，记录到更新块的数据可能是分段的和非顺序的。 代替将更新数据记录到更新块，数据被记录在至少两个交错流中。 当全页数据可用时，它被记录到更新块。 否则，它暂时记录到便笺块块中，直到完整页面的数据可用于传送到更新块。 优选地，管道操作允许一旦主机写入命令指示可以写入完整页面就可以对更新块进行记录。 如果实际的写入数据由于中断而不完整，则设置将被取消，而代之以记录。
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公开(公告)号：US08117381B2
公开(公告)日：2012-02-14
申请号：US13084396
申请日：2011-04-11
IPC分类号： G06F12/00
CPC分类号： G11C29/76 , G06F12/0246 , G06F2212/7201 , G06F2212/7208 , G11C29/808
摘要： The present invention presents techniques for the linking of physical blocks of a non-volatile memory into composite logical structures or “metablocks”. After determining an initial linking of good physical blocks into metablocks, a record of the linking is maintained in the non-volatile memory where it can be readily accessed when needed. In one set of embodiments, the initially linking is deterministically formed according to an algorithm and can be optimized according to the pattern of any bad blocks in the memory. As additional bad blocks arise, the linking is updated using by replacing the bad blocks in a linking with good blocks, preferably in the same sub-array of the memory as the block that they are replacing.
摘要翻译： 本发明提出了用于将非易失性存储器的物理块链接到复合逻辑结构或“元区块”中的技术。 在确定好的物理块到元区块的初始链接之后，在非易失性存储器中维护链接的记录，在需要时可以容易地访问。 在一组实施例中，根据算法确定性地形成初始链接，并且可以根据存储器中的任何坏块的模式进行优化。 随着额外的坏块出现，链接被更新，通过替换与优质块链接的坏块，优选地与它们所替换的块相同的存储器子阵列来更新。
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公开(公告)号：US07913061B2
公开(公告)日：2011-03-22
申请号：US12239351
申请日：2008-09-26
IPC分类号： G06F12/00
CPC分类号： G06F11/1666 , G06F11/1072 , G06F11/141 , G06F11/1415 , G06F11/1658 , G06F12/0246 , G06F2212/7202 , G06F2212/7203 , G06F2212/7205 , G06F2212/7208 , G11C11/5621 , G11C11/5628 , G11C16/102 , G11C16/105 , G11C16/20 , G11C29/00 , G11C29/76 , G11C2211/5641
摘要： A non-volatile memory is constituted from a set of memory planes, each having its own set of read/write circuits so that the memory planes can operate in parallel. The memory is further organized into erasable blocks, each for storing a logical group of logical units of data. In updating a logical unit, all versions of a logical unit are maintained in the same plane as the original. Preferably, all versions of a logical unit are aligned within a plane so that they are all serviced by the same set of sensing circuits. In a subsequent garbage collection operation, the latest version of the logical unit need not be retrieved from a different plane or a different set of sensing circuits, otherwise resulting in reduced performance. In one embodiment, any gaps left after alignment are padded by copying latest versions of logical units in sequential order thereto.
摘要翻译： 非易失性存储器由一组存储器平面构成，每个存储器平面具有其自己的一组读/写电路，使得存储器平面可以并行操作。 存储器被进一步组织成可擦除块，每个块用于存储数据的逻辑单元的逻辑组。 在更新逻辑单元时，逻辑单元的所有版本都保持在与原始单元相同的平面中。 优选地，逻辑单元的所有版本在平面内对准，使得它们都由相同的一组感测电路服务。 在随后的垃圾回收操作中，不需要从不同的平面或不同的感测电路组检索最新版本的逻辑单元，否则导致性能降低。 在一个实施例中，通过按照顺序复制最新版本的逻辑单元来填补对齐之后留下的任何间隙。
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19.发明授权公开(公告)号：US07624239B2
公开(公告)日：2009-11-24
申请号：US11273774
申请日：2005-11-14
IPC分类号： G06F13/12
CPC分类号： G11C16/16 , G06F12/0246 , G06F2212/7205
摘要： The present invention presents a number of improvements for managing erase processes in non-volatile memory. Such memory systems typically manage the memory by logically organize the basic unit of physical erase (erase block) into composite logical groupings (meta-blocks or logical group), where an erase block generally consists of a number of sectors. When an erase command is received, the specified sectors are checked against the memory system's control data. If the specified sectors span any full logical grouping, the full logical groupings can each be treated as a whole and erased according to one process (such as performing a true, physical erase), while other sectors are “logically” erased at the sector level by standard techniques.
摘要翻译： 本发明提出了用于管理非易失性存储器中的擦除处理的许多改进。 这样的存储器系统通常通过将物理擦除的基本单元（擦除块）逻辑地组织到复合逻辑分组（元块或逻辑组）中来管理存储器，其中擦除块通常由多个扇区组成。 当接收到擦除命令时，根据存储器系统的控制数据检查指定的扇区。 如果指定的扇区跨越任何完整的逻辑分组，则完全逻辑分组可以作为一个整体处理，并根据一个进程（如执行真实的物理擦除）进行擦除，而其他扇区在扇区级“逻辑”地擦除 通过标准技术。
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20.发明申请公开(公告)号：US20090019218A1
公开(公告)日：2009-01-15
申请号：US12239489
申请日：2008-09-26
CPC分类号： G06F11/1666 , G06F11/1072 , G06F11/141 , G06F11/1415 , G06F11/1658 , G06F12/0246 , G06F2212/7202 , G06F2212/7203 , G06F2212/7205 , G06F2212/7208 , G11C11/5621 , G11C11/5628 , G11C16/102 , G11C16/105 , G11C16/20 , G11C29/00 , G11C29/76 , G11C2211/5641
摘要： In a nonvolatile memory with block management system that supports update blocks with non-sequential logical units, an index of the logical units in a non-sequential update block is buffered in RAM and stored periodically into the nonvolatile memory. In one embodiment, the index is stored in a block dedicated for storing indices. In another embodiment, the index is stored in the update block itself. In yet another embodiment, the index is stored in the header of each logical unit. In another aspect, the logical units written after the last index update but before the next have their indexing information stored in the header of each logical unit. In this way, after a power outage, the location of recently written logical units can be determined without having to perform a scanning during initialization. In yet another aspect, a block is managed as partially sequential and partially non-sequential, directed to more than one logical subgroup.
摘要翻译： 在具有支持具有非顺序逻辑单元的更新块的块管理系统的非易失性存储器中，非顺序更新块中的逻辑单元的索引被缓冲在RAM中并被周期性地存储到非易失性存储器中。 在一个实施例中，索引被存储在专用于存储索引的块中。 在另一个实施例中，索引被存储在更新块本身中。 在另一个实施例中，索引被存储在每个逻辑单元的标题中。 在另一方面，在最后一个索引更新之后但在下一个之前写入的逻辑单元将其索引信息存储在每个逻辑单元的标题中。 以这种方式，在断电之后，可以确定最近写入的逻辑单元的位置，而不必在初始化期间执行扫描。 在另一方面，块被部署顺序地且部分地非顺序地管理，定向到多于一个的逻辑子组。
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