THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF PRODUCING THIN FILM TRANSISTOR SUBSTRATE

    公开(公告)号:US20200035717A1

    公开(公告)日:2020-01-30

    申请号:US16508603

    申请日:2019-07-11

    Abstract: A thin film transistor substrate includes a source line, a gate electrode, a channel region, a source region, a drain region, and a pixel electrode. The gate electrode is a portion of a first metal film disposed upper than a first insulating film that is disposed upper than a semiconductor film. The source line is a portion of a second metal film disposed upper than a second insulating film that is disposed upper than the first metal film. The channel region is a portion of a section of the semiconductor film and disposed to overlap the gate electrode. The source region is prepared by reducing a resistance of a section of the semiconductor film. The drain region is prepared by reducing a resistance of a section of the semiconductor film. The pixel electrode is prepared by reducing a resistance of a section of the semiconductor film.

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME

    公开(公告)号:US20220077318A1

    公开(公告)日:2022-03-10

    申请号:US17524766

    申请日:2021-11-12

    Abstract: A semiconductor device includes a thin film transistor, wherein: a semiconductor layer of the thin film transistor has a layered structure including a lower oxide semiconductor layer including In, Ga, Zn and Sn and an upper oxide semiconductor layer arranged on the lower oxide semiconductor layer and including In, Ga and Zn; a thickness of the lower oxide semiconductor layer is 20 nm or less; an atomic ratio of Sn with respect to all metal elements of the lower oxide semiconductor layer is 5% or more; the upper oxide semiconductor layer includes no Sn, or an atomic ratio of Sn with respect to all metal elements of the upper oxide semiconductor layer is smaller than an atomic ratio of Sn with respect to all metal elements of the lower oxide semiconductor layer; and a first angle θ1 between a side surface and a lower surface of the lower oxide semiconductor layer is smaller than a second angle θ2 between a side surface and a lower surface of the upper oxide semiconductor layer.

Patent Agency Ranking