MULTIANTENNA RECEIVING DEVICE
    11.
    发明申请
    MULTIANTENNA RECEIVING DEVICE 有权
    多媒体接收设备

    公开(公告)号:US20100008441A1

    公开(公告)日:2010-01-14

    申请号:US12375655

    申请日:2007-07-31

    摘要: A multiantenna receiving device is provided to make it possible to cope with both improvement in error rate characteristic and simplification in structure. The multiantenna receiving device is comprised of soft judgement output units (520_A, 522_A, 524_B, 526_B) for carrying out a soft judgement of a modulation signal in accordance with signal point distances between a plurality of candidate signal points with respect to a plurality of multiplexed modulation signals and a receiving signal, decoding units (528_A, 528_B) for obtaining digital data of the modulation signals by using the judged results obtained by the soft judgement output units (520_A, 522_A, 524_B, 526_B), and signal point decreasing units (512_YA, 512_XA, 514_YA, 514_XA, 516_YB, 516_XB, 518_YB, 518_XB) for decreasing the number of the candidate signal points used in the soft judgement output units (520_A, 522_A, 524_B, 526_B) by recursively using a part of the digital data except self-modulation signals obtained by the decoding units (528_A, 528_B).

    摘要翻译: 提供了一种多天线接收装置,以便能够应对错误率特性的提高和结构简化。 多天线接收装置包括软判断输出单元(520_A,522_A,524_B,526_B),用于根据多个候选信号点之间的信号点距离执行调制信号的软判断 调制信号和接收信号,用于通过使用由软判断输出单元(520_A,522_A,524_B,526_B)获得的判断结果获得调制信号的数字数据的解码单元(528_A,528_B)和信号点减少单元 512_YA,512_XA,514_YA,514_XA,516_YB,516_XB,518_YB,518_XB),用于通过递归地使用一部分数字数据来减少软判断输出单元(520_A,522_A,524_B,526_B)中使用的候选信号点的数量 除了由解码单元(528_A,528_B)获得的自调制信号之外。

    Low-density parity check convolution code (LDPC-CC) encoder and LDPC-CC decoder
    12.
    发明授权
    Low-density parity check convolution code (LDPC-CC) encoder and LDPC-CC decoder 有权
    低密度奇偶校验卷积码(LDPC-CC)编码器和LDPC-CC解码器

    公开(公告)号:US08423876B2

    公开(公告)日:2013-04-16

    申请号:US12668655

    申请日:2008-07-11

    IPC分类号: H03M13/03

    摘要: It is possible to provide and an LDPC-CC (Low-Density Parity-Check Convolution Codes) encoder and an LDPC-CC decoder which performs an error correction encoding and decoding while reducing the amount of a termination sequence required for encoding/decoding the LDPC-CC encoding/decoding and suppressing degradation of the transmission efficiency. The LDPC-CC encoder (400) includes a weight control unit (470) which stores a weight pattern (475) based on an LDPC-CC inspection matrix (100); and a weight pattern (476) based on a check matrix (300) obtained by deforming an LDPC-CC inspection matrix (100). The weight control unit (470) controls a weight to be multiplied onto the outputs of a plurality of shift registers (410-1 to 410-M, 430-1 to 430-M) by using the weight pattern (475) when the input bit is an information sequence, and using a weight pattern (476) which makes a weight value to be multiplied by an inspection bit v2,t to be 0 when the input bit is a termination sequence.

    摘要翻译: 可以提供LDPC-CC(低密度奇偶校验卷积码)编码器和LDPC-CC解码器,该LDPC-CC解码器在减少LDPC编码/解码所需的终止序列的量的同时进行纠错编码和解码 -CC编码/解码并抑制传输效率的降低。 LDPC-CC编码器(400)包括:权重控制单元(470),其基于LDPC-CC检查矩阵(100)存储权重模式(475); 以及基于通过使LDPC-CC检查矩阵(100)变形而获得的校验矩阵(300)的权重模式(476)。 权重控制单元(470)通过使用加权模式(475)来控制要乘以多个移位寄存器(410-1至410-M,430-1至430-M)的输出的权重 位是信息序列,并且当输入比特是终止序列时,使用使加权值乘以检查比特v2的加权模式(476),t为0。

    Transmission method, transmitter apparatus and reception method
    13.
    发明授权
    Transmission method, transmitter apparatus and reception method 有权
    传输方法,发射机设备和接收方法

    公开(公告)号:US08401110B2

    公开(公告)日:2013-03-19

    申请号:US12447885

    申请日:2007-11-01

    IPC分类号: H04L5/12 H04L23/02

    摘要: A transmitter apparatus wherein a simple structure is used to successfully suppress the degradation of error rate performance that otherwise would be caused by fading or the like. There are included encoding parts (11—1-11—4) that encode transport data; a mapping part (3304) that performs such a mapping that encoded data sequentially formed by the encoding parts (11—1-11—4) are not successively included in the same symbol, thereby forming data symbols; and a symbol interleaver (3301) that interleaves the data symbols. In this way, a low computational complexity can be used to perform an interleaving process equivalent to a bit interleaving process to effectively improve the reception quality at a receiving end.

    摘要翻译: 一种发射机装置,其中使用简单的结构来成功地抑制否则将由衰落等引起的误码率性能的降级。 包括编码传输数据的编码部分(11-1-11-4); 执行编码由编码部分(11-1-11-4)顺序形成的数据的映射的映射部分(3304)不被连续地包括在相同的符号中,从而形成数据符号; 以及交错数据符号的符号交织器(3301)。 以这种方式,可以使用低的计算复杂度来执行等同于比特交织处理的交织处理,以有效地提高接收端的接收质量。

    Transmission device
    14.
    发明授权
    Transmission device 有权
    传输设备

    公开(公告)号:US08286064B2

    公开(公告)日:2012-10-09

    申请号:US12738621

    申请日:2008-10-30

    IPC分类号: G06F11/00

    摘要: Provided is a transmission device which improves the error rate characteristic upon decoding when performing error correction encoding by using a self-orthogonal code or an LDPC-CC in a communication system using a communication path having a fading fluctuation, multi-value modulation, or MIMO transmission. In the transmission device, the self-orthogonal encoding unit (110) encodes a self-orthogonal code having a constriction length K and an interleave unit (130) rearranges a code word sequence so that the same modulation symbol includes an information bit of a moment i and a non-correlated bit of the information bit of the moment i in a multi-value modulation unit (150).

    摘要翻译: 提供一种传输装置,其在使用具有衰落波动,多值调制或MIMO的通信路径的通信系统中通过使用自正交码或LDPC-CC进行纠错编码时,提高解码时的错误率特性 传输。 在发送装置中,自正交编码单元(110)编码具有收缩长度K的自正交码和交织单元(130)重新排列码字序列,使得相同的调制符号包括一个信息位 i和多值调制单元(150)中的时刻i的信息比特的非相关比特。

    Reception device
    15.
    发明授权
    Reception device 有权
    接收设备

    公开(公告)号:US08121227B2

    公开(公告)日:2012-02-21

    申请号:US12882989

    申请日:2010-09-15

    IPC分类号: H04L27/06 H04L1/02

    摘要: It is possible to demodulate a plurality of modulated signals transmitted from a plurality of antennas by using a comparatively small-size circuit with a preferable error ratio characteristic. Partial bit judgment units (509, 512) demodulates partial bits of the 64QAM-modulated signal by modifying which of the bits in the 6-bit strings constituting a symbol is to be demodulated depending on in which region of the IQ plane the reception signal point exists. This improves the partial bit error characteristic judged by the partial bit judgment units (509, 512), which in turn improves reliability of the reduced candidate signal point for use by a likelihood detection unit (518). As a result, it is possible to improve the error ratio characteristic of the final reception digital signals (322, 323).

    摘要翻译: 可以通过使用具有优选误差比特性的较小尺寸的电路来解调从多个天线发送的多个调制信号。 部分位判断单元(509,512)通过根据IQ平面的哪个区域修改构成符号的6位串中的哪个位要解调64QAM调制信号的部分位,接收信号点 存在 这改善了由部分比特判断单元(509,512)判断的部分比特误差特性,这又提高了可靠性检测单元(518)使用的缩减候补信号点的可靠性。 结果,可以提高最终接收数字信号(322,323)的误差比特性。

    ENCODER, DECODER, ENCODING METHOD, AND DECODING METHOD
    16.
    发明申请
    ENCODER, DECODER, ENCODING METHOD, AND DECODING METHOD 有权
    编码器,解码器,编码方法和解码方法

    公开(公告)号:US20100269009A1

    公开(公告)日:2010-10-21

    申请号:US12745216

    申请日:2008-12-18

    IPC分类号: H03M13/05 G06F11/10

    摘要: There is provided an encoder that provides a termination sequence with a simple structure for LDPC-CC encoding and reduces an amount of the termination sequence transmitted to a transmission line. The LDPC-CC encoder (200) connects a first encoder (230) to a second encoder (240) to perform encoding and thereby carry out LDPC-CC encoding, the first encoder (230) performing encoding based on an partial parity check matrix for information bits (110) obtained by extracting a sequence corresponding to the information bits in a parity check matrix (100) and the second encoder (240) performing encoding based on a partial parity check matrix for parity bits (120) obtained by extracting a sequence corresponding to the parity bits in the parity check matrix (100). A termination sequence generator (210) generates a termination sequence including the same number of bits as the memory length of the first encoder (230) and provides the generated termination sequence as an input sequence.

    摘要翻译: 提供了一种编码器,其提供具有用于LDPC-CC编码的简单结构的终止序列,并减少发送到传输线的终止序列的量。 LDPC-CC编码器(200)将第一编码器(230)连接到第二编码器(240)以执行编码,从而执行LDPC-CC编码,第一编码器(230)基于部分奇偶校验矩阵执行编码, 通过提取与奇偶校验矩阵(100)中的信息比特相对应的序列获得的信息比特(110)和基于通过提取序列获得的奇偶校验比特(120)的部分奇偶校验矩阵执行编码的第二编码器(240) 对应于奇偶校验矩阵(100)中的奇偶校验位。 终止序列生成器(210)生成包括与第一编码器(230)的存储器长度相同数量的位的终止序列,并且将生成的终止序列提供为输入序列。

    TRANSMITTING DEVICE AND TRANSMITTING METHOD
    17.
    发明申请
    TRANSMITTING DEVICE AND TRANSMITTING METHOD 有权
    发送设备和发送方法

    公开(公告)号:US20100192047A1

    公开(公告)日:2010-07-29

    申请号:US12668829

    申请日:2008-07-11

    IPC分类号: H03M13/03 G06F11/00

    摘要: A transmitting device and method enabling improvement of the reception quality on the receiving side when the LDPC-CC (Low-Density Parity-Check Convolutional Codes) encoding is used. The transmitting device (100) comprises an LDPC-CC encoding section (102), a sorting section (121) for sorting the encoded data (120) acquired by the LDPC-CC encoding section (102) into a first encoded data set (103_A) corresponding to the column number of the column containing “1” in a part of an LDPC-CC check matrix H from which a protograph is excluded and a second encoded data set (103_B) corresponding to the column numbers of the columns other than that, and a frame constructing section (a control section (106)) for constructing a transmission frame where the first and second encoded data sets (103_A, 103_B) are arranged in positions different in time or frequency in the transmission frame.

    摘要翻译: 当使用LDPC-CC(低密度奇偶校验卷积码)编码时,能够提高接收侧的接收质量的发送装置和方法。 发送设备(100)包括LDPC-CC编码部分(102),用于将由LDPC-CC编码部分(102)获取的编码数据(120)分类为第一编码数据集(103_A)的排序部分 )对应于从其排除原型图的LDPC-CC校验矩阵H的一部分中包含“1”的列的列号,以及对应于除此之外的列的列号的第二编码数据集(103_B) ,以及用于构造传输帧的帧构造部(控制部(106)),其中第一和第二编码数据集(103_A,103_B)被布置在传输帧中的时间或频率不同的位置。

    Encoder, decoder, encoding method, and decoding method
    18.
    发明授权
    Encoder, decoder, encoding method, and decoding method 有权
    编码器,解码器,编码方法和解码方法

    公开(公告)号:US08458577B2

    公开(公告)日:2013-06-04

    申请号:US12745216

    申请日:2008-12-18

    IPC分类号: G06F11/00

    摘要: There is provided an encoder that provides a termination sequence with a simple structure for LDPC-CC encoding and reduces an amount of the termination sequence transmitted to a transmission line. The LDPC-CC encoder (200) connects a first encoder (230) to a second encoder (240) to perform encoding and thereby carry out LDPC-CC encoding, the first encoder (230) performing encoding based on an partial parity check matrix for information bits (110) obtained by extracting a sequence corresponding to the information bits in a parity check matrix (100) and the second encoder (240) performing encoding based on a partial parity check matrix for parity bits (120) obtained by extracting a sequence corresponding to the parity bits in the parity check matrix (100). A termination sequence generator (210) generates a termination sequence including the same number of bits as the memory length of the first encoder (230) and provides the generated termination sequence as an input sequence.

    摘要翻译: 提供了一种编码器,其提供具有用于LDPC-CC编码的简单结构的终止序列,并减少发送到传输线的终止序列的量。 LDPC-CC编码器(200)将第一编码器(230)连接到第二编码器(240)以执行编码,从而执行LDPC-CC编码,第一编码器(230)基于部分奇偶校验矩阵执行编码, 通过提取与奇偶校验矩阵(100)中的信息比特相对应的序列获得的信息比特(110)和基于通过提取序列获得的奇偶校验比特(120)的部分奇偶校验矩阵执行编码的第二编码器(240) 对应于奇偶校验矩阵(100)中的奇偶校验位。 终止序列生成器(210)生成包括与第一编码器(230)的存储器长度相同数量的位的终止序列,并且将生成的终止序列提供为输入序列。

    Transmitting device and transmitting method
    19.
    发明授权
    Transmitting device and transmitting method 有权
    传输设备和传输方式

    公开(公告)号:US08423871B2

    公开(公告)日:2013-04-16

    申请号:US12668829

    申请日:2008-07-11

    IPC分类号: H03M13/00 H04B7/10

    摘要: A transmitting device and method enables improved reception quality on the receiving side when LDPC-CC (Low-Density Parity-Check Convolutional Codes) encoding is used. The transmitting device includes an LDPC-CC encoding section, a sorting section for sorting the encoded data acquired by the LDPC-CC encoding section into a first encoded data set corresponding to the column number of the column containing “1” in a part of an LDPC-CC check matrix H from which a protograph is excluded and a second encoded data set corresponding to the column numbers of the columns other than that, and a frame constructing section (control section) for constructing a transmission frame where the first and second encoded data sets are arranged in positions different in time or frequency in the transmission frame.

    摘要翻译: 当使用LDPC-CC(低密度奇偶校验卷积码)编码时,发送装置和方法能够改善接收侧的接收质量。 发送装置包括LDPC-CC编码部分,用于将由LDPC-CC编码部分获取的编码数据分类为与LDPC-CC编码部分的一部分中包含1的列的列号相对应的第一编码数据集的分类部分, 排除原型图的CC校验矩阵H和对应于除此之外的列的列号的第二编码数据集,以及用于构造第一和第二编码数据集的传输帧的帧构成部分(控制部分) 被布置在传输帧中的时间或频率不同的位置。

    LOW-DENSITY PARITY CHECK CONVOLUTION CODE (LDPC-CC) ENCODER AND LDPC-CC DECODER
    20.
    发明申请
    LOW-DENSITY PARITY CHECK CONVOLUTION CODE (LDPC-CC) ENCODER AND LDPC-CC DECODER 有权
    低密度奇偶校验调制码(LDPC-CC)编码器和LDPC-CC解码器

    公开(公告)号:US20100199153A1

    公开(公告)日:2010-08-05

    申请号:US12668655

    申请日:2008-07-11

    IPC分类号: H03M13/15 G06F11/10

    摘要: It is possible to provide and an LDPC-CC (Low-Density Parity-Check Convolution Codes) encoder and an LDPC-CC decoder which performs an error correction encoding and decoding while reducing the amount of a termination sequence required for encoding/decoding the LDPC-CC encoding/decoding and suppressing degradation of the transmission efficiency. The LDPC-CC encoder (400) includes a weight control unit (470) which stores a weight pattern (475) based on an LDPC-CC inspection matrix (100); and a weight pattern (476) based on a check matrix (300) obtained by deforming an LDPC-CC inspection matrix (100). The weight control unit (470) controls a weight to be multiplied onto the outputs of a plurality of shift registers (410-1 to 410-M, 430-1 to 430-M) by using the weight pattern (475) when the input bit is an information sequence, and using a weight pattern (476) which makes a weight value to be multiplied by an inspection bit v2,t to be 0 when the input bit is a termination sequence.

    摘要翻译: 可以提供LDPC-CC(低密度奇偶校验卷积码)编码器和LDPC-CC解码器,该LDPC-CC解码器在减少LDPC编码/解码所需的终止序列的量的同时进行纠错编码和解码 -CC编码/解码并抑制传输效率的降低。 LDPC-CC编码器(400)包括:权重控制单元(470),其基于LDPC-CC检查矩阵(100)存储权重模式(475); 以及基于通过使LDPC-CC检查矩阵(100)变形而获得的校验矩阵(300)的权重模式(476)。 权重控制单元(470)通过使用加权模式(475)来控制要乘以多个移位寄存器(410-1至410-M,430-1至430-M)的输出的权重 位是信息序列,并且当输入比特是终止序列时,使用使加权值乘以检查比特v2的加权模式(476),t为0。