公开(公告)号：US20210036662A1

公开(公告)日：2021-02-04

申请号：US16528065

申请日：2019-07-31

Applicant: Silicon Laboratories Inc.

Inventor： Mohammad Al-Shyoukh

IPC: H03F1/02 ,  H03F3/45 ,  H04B1/16

Abstract: A receiver front-end includes a first peaking gain stage configured to amplify a received differential pair of signals received on an input differential pair of nodes. The first peaking gain stage has a first frequency response including a first peak gain at or near a carrier frequency in a first pass band. The first peak gain occurs just prior to a first cutoff frequency. A second peaking gain stage is configured to amplify a differential pair of signals generated by the first peaking gain stage. The second peaking gain stage has a high input impedance and a second frequency response including a second peak gain at or near the carrier frequency in a second pass band. The second peak gain occurs just prior to a second cutoff frequency. The first peaking gain stage and the second peaking gain stage have a cascaded peak gain at or near the carrier frequency.

公开(公告)号：US20210033662A1

公开(公告)日：2021-02-04

申请号：US16528256

申请日：2019-07-31

Applicant: Silicon Laboratories Inc.

Inventor： Mohammad Al-Shyoukh ,  Peter Onody

IPC: G01R31/28 ,  H05K1/02 ,  G01R31/00 ,  H01R13/6461

Abstract: A method for calibrating an isolator product includes generating a differential pair of signals on a differential pair of nodes at an input of a demodulator circuit of a receiver signal path of a first integrated circuit die of the isolator product based on a received differential pair of signals. The method includes generating a diagnostic output signal having a level corresponding to an average amplitude of the differential pair of signals. The method includes driving the diagnostic output signal to an output terminal of the isolator product. The method may include transmitting a diagnostic signal using a carrier signal having a frequency by a second integrated circuit die via an isolation channel. The method may include, during the transmitting, sweeping the frequency of the carrier signal across a frequency band. The method may include, during the sweeping, capturing the diagnostic output signal via the output terminal.

公开(公告)号：US10833535B2

公开(公告)日：2020-11-10

申请号：US16141052

申请日：2018-09-25

Applicant: Silicon Laboratories Inc.

Inventor： Mohammad Al-Shyoukh ,  Krishna Pentakota ,  Stefan N. Mastovich

IPC: H02J50/12 ,  H02M3/338 ,  H02M3/335 ,  H02M3/337

Abstract: A power transfer device includes a first power supply node, a second power supply node, and an oscillator circuit configured to convert an input DC signal across the first power supply node and the second power supply node into an AC signal on a differential pair of nodes comprising a first node and a second node in response to a control signal. The oscillator circuit includes a regulated power supply node and an active shunt regulator circuit configured to clamp a peak voltage level across the regulated power supply node and the second power supply node to a clamped voltage level. The clamped voltage level is linearly related to a first voltage level on the first power supply node.

公开(公告)号：US10511273B2

公开(公告)日：2019-12-17

申请号：US15835230

申请日：2017-12-07

Applicant: Silicon Laboratories Inc.

Inventor： Mohammad Al-Shyoukh ,  Krishna Pentakota ,  Stefan N. Mastovich

IPC: H03F3/217 ,  H02J50/05 ,  H02J50/80 ,  H02M3/335 ,  H02M5/458 ,  H02M7/797 ,  H02M1/08 ,  H01L29/66 ,  H02M3/338 ,  H02M1/34 ,  H02H9/00 ,  H03F3/04 ,  H01L29/78 ,  H02M1/00 ,  H02M1/32

Abstract: A power transfer device includes an oscillator circuit having a first node, a second node, and a control terminal. The oscillator circuit includes a cascode circuit comprising transistors having a first conductivity type and a first breakdown voltage. The cascode circuit is coupled to the control terminal, the first node, and the second node. The oscillator circuit includes a latch circuit coupled between the cascode circuit and a first power supply node. The latch circuit includes cross-coupled transistors having the first conductivity type and a second breakdown voltage. The first breakdown voltage is greater than the second breakdown voltage. The oscillator circuit may be configured to develop a pseudo-differential signal on the first node and the second node. The pseudo-differential signal may have a peak voltage of at least three times a voltage level of an input DC signal on a second power supply node.

公开(公告)号：US20190181817A1

公开(公告)日：2019-06-13

申请号：US15835230

申请日：2017-12-07

Applicant: Silicon Laboratories Inc.

Inventor： Mohammad Al-Shyoukh ,  Krishna Pentakota ,  Stefan N. Mastovich

IPC: H03F3/217 ,  H02J50/05 ,  H02J50/80 ,  H02M3/335 ,  H02M5/458 ,  H02M7/797 ,  H01L29/66 ,  H02M1/08

CPC classification number: H03F3/217 ,  H01L29/66106 ,  H01L29/66143 ,  H01L29/7816 ,  H02H9/005 ,  H02J50/05 ,  H02J50/80 ,  H02M1/08 ,  H02M1/32 ,  H02M1/34 ,  H02M3/33515 ,  H02M3/33592 ,  H02M3/3387 ,  H02M5/458 ,  H02M7/797 ,  H02M2001/0003 ,  H03F3/04 ,  H03F3/2171

Abstract: A power transfer device includes an oscillator circuit having a first node, a second node, and a control terminal. The oscillator circuit includes a cascode circuit comprising transistors having a first conductivity type and a first breakdown voltage. The cascode circuit is coupled to the control terminal, the first node, and the second node. The oscillator circuit includes a latch circuit coupled between the cascode circuit and a first power supply node. The latch circuit includes cross-coupled transistors having the first conductivity type and a second breakdown voltage. The first breakdown voltage is greater than the second breakdown voltage. The oscillator circuit may be configured to develop a pseudo-differential signal on the first node and the second node. The pseudo-differential signal may have a peak voltage of at least three times a voltage level of an input DC signal on a second power supply node.