Abstract:
A memory controller coupled to a memory device and a host device and configured to control access operations of the memory device includes a buffer memory, a host interface, a microprocessor and a data protection engine. The host interface is coupled to the host device and configured to write data received from the host device into the buffer memory and issue a buffer memory write complete notification after the data has been written in the buffer memory. The microprocessor is configured to trigger a data protection operation in response to the buffer memory write complete notification. The protection engine is configured to perform the data protection operation to generate corresponding protection information according to the data written in the buffer memory. The microprocessor is configured to directly trigger the data protection operation after confirming that the data has been written in the buffer memory.
Abstract:
A memory controller coupled to a memory device and configured to control access operations of the memory device includes a data protection engine and a microprocessor. The data protection engine is configured to generate protection information according to data received from a host device. The microprocessor is configured to detect a status of the memory device in response to one or more write operations for writing the data to the memory device, determine whether a portion of the data has to be excluded when generating the protection information corresponding to the data according to the status and accordingly generate a determination result, and store the protection information and the determination result together in the memory device. The determination result indicates which portion of the data is utilized to generate the protection information.
Abstract:
A data-downloading technique for a data storage device before soldering the data storage device into a product. The data storage device uses a flash memory to provide first-type blocks (using single level cells) and second-type blocks (using multi-level cells). Before soldering the data storage device onto a printed circuit board, a controller of the data storage device allocates the first-type blocks to store data from a host. When the allocated number of first-type blocks reaches an upper limit, the controller changes to allocate the second-type blocks to store data from the host. When detecting that the controller has changed to allocate the flash memory to provide the second-type blocks to receive data from the host, the controller returns a fail message to the host to indicate unreliable write operations prior to soldering.
Abstract:
The invention introduces a method for GC (Garbage Collection) in a flash memory, performed by a processing unit, including at least the following steps: reading n×m pages of good data from storage sub-units, wherein n indicates the quantity of storage sub-units sharing one channel and m indicates the quantity of pages for programming data into one storage sub-unit; and repeatedly performing a loop for directing each of the storage sub-units to program m pages of good data until all of the storage sub-units are operated in busy states.
Abstract:
A memory system with a programming status is provided. The memory includes at least one first memory, at least one second memory and a controller. Each of the at least one first memory includes a plurality of memory regions to store data. Each of the at least one second memory includes a plurality of memory regions for programming the data from the at least one first memory. The controller is coupled to the second memory and utilized to record a programming status of the data. Whether the programming is successful or not is checked when the at least one first memory or the at least one second memory is going to be implemented by inquiring the programming status, and the at least one first memory stores the data until the programming is checked to be successful.
Abstract:
A data storage device includes a FLASH memory and a controller. The FLASH memory includes a plurality of blocks wherein each of the blocks includes a plurality of pages. The controller is coupled to the FLASH memory and utilized to execute a garbage-collection process on the FLASH memory according to a number of spare blocks in the FLASH memory and a number of inefficient blocks where most of the pages are spare in the FLASH memory. The garbage-collection process is utilized for merging at least two inefficient blocks to release at least one spare block from the inefficient blocks.
Abstract:
The invention relates to a method, a non-transitory computer-readable storage medium and an apparatus for executing host write commands. The method performed by a processing unit includes: providing a sequential-write command queue (SCQ), a random-write command queue (RCQ) and a mark queue; when a specific condition is met, obtaining a first logical address range carried in the conflicting sequential write command and second logical address ranges carried in the sequential write commands earlier than the conflicting sequential write command from the SCQ, and/or a third logical address range carried in the conflicting random write command and fourth logical address ranges carried in the random write commands earlier than the conflicting random write command from the RCQ according to content of the record; reading user data of the first logical address range from a first address of the RAM and user data of the second logical address ranges from second addresses of the RAM, and/or user data of the third logical address range from a third address of the RAM and user data of the fourth logical address ranges from fourth addresses of the RAM; and programming the user data of the first logical address range and the second logical address ranges, and/or the user data of the third logical address range and the fourth logical address ranges into the flash module.
Abstract:
The invention introduces a method for executing host input-output (IO) commands, performed by a processing unit of a device side, at least including: in response to different types of host IO commands, using multiple stages of a generic framework to drive a frontend interface to interact with a host side for transmitting user data read from a storage unit to the host side, and receiving user data to be programmed into the storage unit from the host side. The frontend interface includes a register, and a data line coupled to the host side. The stages of the generic framework are used to access to the register of the frontend interface and operate the data line of the frontend interface to complete interactions with the host side.
Abstract:
The invention relates to a method, a non-transitory computer-readable storage medium and an apparatus for programming data into flash memory. The method includes: generating a front-end parameter set, a mid-end parameter set and a back-end parameter set for each data-programming transaction; transmitting the front-end parameter set of each data-programming transaction to a routing engine, thereby enabling the routing engine to drive a host interface (I/F) to obtain from the host side; transmitting the mid-end parameter set of each data-programming transaction to an accelerator, thereby enabling the accelerator to drive the RAID engine to encrypt raw data or generate parity-page data according to multiple pages of the raw data; and transmitting the back-end parameter set of each data-programming transaction to the accelerator, thereby enabling the accelerator to drive a data access engine to program source data into a designated physical address of a flash module.
Abstract:
The invention introduces a method for executing host input-output (IO) commands, performed by a processing unit of a device side, at least including: in response to different types of host IO commands, using multiple stages of a generic framework to drive a frontend interface to interact with a host side for transmitting user data read from a storage unit to the host side, and receiving user data to be programmed into the storage unit from the host side.