公开(公告)号：US06552609B2

公开(公告)日：2003-04-22

申请号：US09784601

申请日：2001-02-15

申请人： Hajime Hamada ,  Yasuyuki Oishi ,  Takuro Kubo ,  Takayoshi Ode ,  Kazuo Nagatani ,  Hiroyoshi Ishikawa

发明人： Hajime Hamada ,  Yasuyuki Oishi ,  Takuro Kubo ,  Takayoshi Ode ,  Kazuo Nagatani ,  Hiroyoshi Ishikawa

IPC分类号： H03F126

CPC分类号： H03F1/3294 ,  H03F1/3247 ,  H03F1/3282

摘要： Digital input signals xi and xq are multiplied by an multiplier 31 with a distortion compensation coefficient of a distortion compensation coefficient storage unit 33 and then processed by a modulation/amplification unit 1 for sending in the form of analog output signals Z. The analog output signals Z are fed back for processings by an attenuator 43, a mixer 41, a quadrature demodulator 39, etc., and then fed to subtractors 35i and 35q. The subtractors 35i and 35q find differences (errors) between analog input signals Xi and Xq and analog feedback signals Yi and Yq, respectively, and feeds the analog error signals to ADCs 36i and 36q, respectively. The ADCs 36i and 36q convert the analog error signals into digital signals and feeds the digital signals to a distortion compensation coefficient arithmetic unit 5. The distortion compensation coefficient arithmetic unit 5 figures out a new distortion compensation coefficient to update the distortion compensation coefficient storage unit 33.

公开(公告)号：US06496474B1

公开(公告)日：2002-12-17

申请号：US09159377

申请日：1998-09-23

申请人： Kazuo Nagatani ,  Yasuyuki Oishi ,  Hajime Hamada

发明人： Kazuo Nagatani ,  Yasuyuki Oishi ,  Hajime Hamada

IPC分类号： H04J1302

CPC分类号： H04L1/0059 ,  H04J3/0602 ,  H04J13/0022 ,  H04J13/102 ,  H04L1/0042

摘要： An m-bit shift register stores data to be sent that are generated by a data generator 1 bit at a time sequentially. An orthogonal M sequence generator generates an M sequence with the m bits of data to be sent that are stored in the shift register as an initial value, then generates an orthogonal M sequence from that M sequence. A clock signal generator generates a clock signal of frequency 2m times the data rate of the data to be sent. The orthogonal M sequence generator operates in accordance with that clock signal.

摘要翻译： 一个m位移位寄存器一次存储由数据发生器1位产生的要发送的数据。 正交M序列发生器产生具有存储在移位寄存器中的要发送的数据的m位的M序列作为初始值，然后从该M序列生成正交M序列。 时钟信号发生器产生频率为要发送的数据的数据速率2m倍的时钟信号。 正交M序列发生器根据该时钟信号进行工作。

公开(公告)号：US6108548A

公开(公告)日：2000-08-22

申请号：US924051

申请日：1997-08-28

申请人： Hideto Furukawa ,  Yasuyuki Oishi ,  Kazuo Nagatani ,  Yoshiharu Tajima ,  Hidenobu Fukumasa

发明人： Hideto Furukawa ,  Yasuyuki Oishi ,  Kazuo Nagatani ,  Yoshiharu Tajima ,  Hidenobu Fukumasa

IPC分类号： H04B7/02 ,  H04W36/18 ,  H04Q7/32

CPC分类号： H04B7/022 ,  H04W36/18

摘要： A mobile station is provided which does not cause a reduction in the speech transmission capacity. Branches receive radio signals from base stations and operate independently of one another. A branch operation control section controls the operation of the individual branches to detect a destination-side base station based on the reception levels of signals from surrounding base stations, to cause part of the branches to establish synchronization of spreading code and carrier frequency with respect to the destination-side base station while causing the other part of the branches to maintain communication with a departure-side base station after the destination-side base station is detected, and to cut off the communication with the departure-side base station after the synchronization is established.

摘要翻译： 提供了不会导致语音传输能力降低的移动台。 分支机构接收来自基站的无线电信号，并且彼此独立地操作。 分支操作控制部分基于来自周围基站的信号的接收电平来控制各个分支的操作​​以检测目的地侧基站，以使部分分支建立扩展码和载波频率的相对于 目的地侧基站，同时在检测到目的地侧基站之后使分支的其他部分保持与出发侧基站的通信，并且在同步之后切断与出发侧基站的通信 成立

公开(公告)号：US6097714A

公开(公告)日：2000-08-01

申请号：US872358

申请日：1997-06-10

申请人： Kazuo Nagatani ,  Yasuyuki Oishi ,  Hidenobu Fukumasa ,  Hajime Hamada ,  Yoshihiko Asano

发明人： Kazuo Nagatani ,  Yasuyuki Oishi ,  Hidenobu Fukumasa ,  Hajime Hamada ,  Yoshihiko Asano

IPC分类号： H04L27/20 ,  H04B1/707 ,  H04B1/7097 ,  H04J13/00 ,  H04J13/12 ,  H04B7/216 ,  H04B15/00 ,  H04Q7/28

CPC分类号： H04J13/00 ,  H04B1/707 ,  H04J13/0051 ,  H04B2201/70701 ,  H04B2201/70706 ,  H04J13/12

摘要： A code multiplexing transmitting apparatus spread-spectrum modulates transmission data of a plurality of channels by spreading codes that differ from one another, combines the spread-spectrum signals of each of the channels and transmits the resultant spread-spectrum modulated signal. A spread-spectrum modulating unit for each channel includes a phase shifter for shifting, by a predetermined angle channel by channel, the phase of a position vector of the spread-spectrum modulated signal of each channel. As the result of such phase control, the phases of pilot signal portions of the spread-spectrum modulated signals of the respective channels are shifted relative to one another so that the peak values of the code-multiplexed signal can be suppressed.

公开(公告)号：US6041034A

公开(公告)日：2000-03-21

申请号：US940479

申请日：1997-09-30

申请人： Hidenobu Fukumasa ,  Yasuyuki Oishi ,  Kazuo Nagatani ,  Hajime Hamada

发明人： Hidenobu Fukumasa ,  Yasuyuki Oishi ,  Kazuo Nagatani ,  Hajime Hamada

IPC分类号： H04B1/69 ,  H04B7/26 ,  H04J11/00 ,  H04J13/12 ,  H04W88/00 ,  H04B7/216 ,  H04B7/212 ,  H04B1/38

CPC分类号： H04J13/102 ,  H04J13/0025

摘要： Co-channel interference may be prevented even if data having different transmission rates are concurrently multiplied to a same frequency band width with a different spreading factors. A method for generating code division multiple access data from data having different rates by a direct spread spectrum includes the steps of combining an orthogonal code and a reversed orthogonal code obtained by inverting the orthogonal code, for each of orthogonal code sequence structured by an m-sequence thereby to generate a first sequence of orthogonal codes, combing two of the orthogonal code for each of orthogonal code sequences structured by the m-sequence thereby to generate a second sequence of orthogonal codes, combining two of the reversed orthogonal code for each of orthogonal code sequences structured by the m-sequence thereby to generate a third sequence of orthogonal codes, and generating another orthogonal code having twice a code length of the orthogonal code from the first, second and third sequence of orthogonal codes; and multiplying the generated orthogonal code and a different m-sequence, together.

摘要翻译： 即使具有不同传播速率的数据被同时乘以具有不同扩频因子的相同频带宽度，也可以防止同信道干扰。 一种用于通过直接扩展频谱从具有不同速率的数据产生码分多址数据的方法，包括以下步骤：对由正交码构成的正交码序列中的每一个组合正交码和反相正交码， 从而产生正交码的第一序列，对由m序列构成的每个正交码序列组合正交码中的两个，从而产生正交码的第二序列，将正交码中的每一个合成两个正交码 由m序列构成的码序列，从而产生正交码的第三序列，并且从正交码的第一，第二和第三序列生成具有正交码的码长的两倍的另一个正交码; 并将所生成的正交码与不同的m序列相乘。

公开(公告)号：US6018545A

公开(公告)日：2000-01-25

申请号：US820552

申请日：1997-03-19

申请人： Hidenobu Fukumasa ,  Yasuyuki Oishi ,  Hideto Furukawa ,  Kazuo Nagatani ,  Yoshiharu Tajima

发明人： Hidenobu Fukumasa ,  Yasuyuki Oishi ,  Hideto Furukawa ,  Kazuo Nagatani ,  Yoshiharu Tajima

IPC分类号： H04B1/707 ,  H04B1/7073 ,  H04K1/00

CPC分类号： H04B1/707

摘要： A plurality of chips generated by spectrum spreading from each of the bits constituting transmission information are distributed along the time axis, and transmitted. At the receiving end, the transmission information is recovered while integrating information of the chips distributed along the time axis. In a first aspect of the present invention, the transmission information is repeated multiple times, and then the resulting information is spread by a spreading code to generate the transmission data. In a second aspect of the present invention, the transmission information is first spread by a spreading code and then interleaved to generate the transmission data.

摘要翻译： 多个由光谱从构成发送信息的比特的扩展产生的切屑沿时间轴分散，并且发送。 在接收端，同时整合沿时间轴分布芯片的信息的发送信息被回收。 在本发明的第一个方面中，传输信息被重复多次，然后将所得的信息由扩展码扩展，以生成发送数据。 在本发明的第二方面中，传输信息首先用扩展码扩展，然后被交织以产生传输数据。

公开(公告)号：US5870668A

公开(公告)日：1999-02-09

申请号：US688443

申请日：1996-07-30

申请人： Takeshi Takano ,  Yasuyuki Oishi ,  Eisuke Fukuda ,  Hideto Furukawa ,  Kazuo Nagatani

发明人： Takeshi Takano ,  Yasuyuki Oishi ,  Eisuke Fukuda ,  Hideto Furukawa ,  Kazuo Nagatani

IPC分类号： H03D7/16 ,  H03F1/32 ,  H04B7/0005

CPC分类号： H03D7/168 ,  H03F1/3241 ,  H03F2200/372

摘要： A amplifier having distortion compensation is employed as a power amplifier for amplifying a linear modulated signal or a low noise amplifier for amplifying a linear modulated signal. The amplifier having distortion compenssation includes an amplifier circuit for amplifying an input signal; an error detecting circuit for obtaining an error signal between the input signal to and an output signal from the amplifier circuit; a coefficient generating circuit for generating compensation coefficients to compensate distortion components of characteristics of the amplifier circuit, based on the error signal according to an adaptive type algorithm; a first outputting circuit for outputting a generated compensation coefficient corresponding to the input signal; and a multiplying circuit for multiplying the generated compensation coefficient to the input signal and inputting a multiplied coefficient to the amplifier circuit.

摘要翻译： 使用具有失真补偿的放大器作为用于放大线性调制信号的功率放大器或用于放大线性调制信号的低噪声放大器。 具有失真补偿的放大器包括用于放大输入信号的放大器电路; 用于获得来自放大器电路的输入信号与输出信号之间的误差信号的误差检测电路; 系数产生电路，用于根据自适应型算法产生补偿系数以补偿放大器电路的特性的失真分量; 第一输出电路，用于输出与输入信号对应的产生的补偿系数; 以及乘法电路，用于将所生成的补偿系数与输入信号相乘，并将乘法系数输入到放大器电路。

公开(公告)号：US07663436B2

公开(公告)日：2010-02-16

申请号：US12000616

申请日：2007-12-14

申请人： Takeshi Takano ,  Yasuyuki Oishi ,  Toru Maniwa

发明人： Takeshi Takano ,  Yasuyuki Oishi ,  Toru Maniwa

IPC分类号： H03F1/26

CPC分类号： H03F1/3247 ,  H03F1/30 ,  H03F1/3282 ,  H03F2201/3209 ,  H03F2201/3212 ,  H03F2201/3224 ,  H03F2201/3233

摘要： A power amplifier negates a memory effect and is applied a linearizer using a digital predistortion system even in an inexpensive device. The power amplifier compares an input signal power against a sampled component of an output power, and provides predistortion to the input signal power so as to minimize a difference as a result of the comparison. The power amplifier comprises a gain lookup table storing a gain coefficient value corresponding to a temperature address determined for an input power; a phase lookup table storing a phase coefficient value corresponding to the temperature address determined for the input power; a transversal filter, which is input with the input power, and which outputs the temperature address; and a coefficient multiplier modulating the input signal using a gain coefficient value and a phase coefficient value, which correspond to the temperature address and which are read out from the gain coefficient lookup table and the phase lookup table.

摘要翻译： 功率放大器消除了记忆效应，并且即使在廉价的设备中也使用数字预失真系统应用线性化。 功率放大器将输入信号功率与输出功率的采样分量进行比较，并且为输入信号功率提供预失真，以便作为比较的结果使差异最小化。 功率放大器包括：增益查找表，其存储对应于为输入功率确定的温度地址的增益系数值; 相位查找表，存储与为输入功率确定的温度地址对应的相位系数值; 横向滤波器，其输入有输入功率，并输出温度地址; 以及系数乘法器，其使用与所述温度地址对应并且从所述增益系数查找表和所述相位查找表读出的增益系数值和相位系数值来调制所述输入信号。

公开(公告)号：US07551905B2

公开(公告)日：2009-06-23

申请号：US10998283

申请日：2004-11-23

申请人： Tokuro Kubo ,  Kazuo Nagatani ,  Hajime Hamada ,  Hiroyoshi Ishikawa ,  Nobukazu Fudaba ,  Yasuyuki Oishi ,  Toru Maniwa ,  Hiroyuki Hayashi

发明人： Tokuro Kubo ,  Kazuo Nagatani ,  Hajime Hamada ,  Hiroyoshi Ishikawa ,  Nobukazu Fudaba ,  Yasuyuki Oishi ,  Toru Maniwa ,  Hiroyuki Hayashi

IPC分类号： H01Q11/12

CPC分类号： H04L27/368 ,  H03F1/3247 ,  H03F1/3294 ,  H03F2200/447 ,  H03F2201/3233

摘要： A distortion compensation apparatus of the present invention is used in a transmitter that produces and outputs a second signal from a first signal. This apparatus comprises a delay unit for delaying a feedback signal obtained from by the second signal; and a delay control unit for determining a delay quantity of said delay means so that a timing difference between a reference signal obtained from the first signal and the feedback signal delayed by the delay unit is made small. The delay control unit limits the delay quantity within a predetermined limit value.

摘要翻译： 本发明的失真补偿装置用于从第一信号产生并输出第二信号的发送器中。 该装置包括用于延迟由第二信号获得的反馈信号的延迟单元; 以及延迟控制单元，用于确定所述延迟装置的延迟量，使得从第一信号获得的参考信号和由延迟单元延迟的反馈信号之间的定时差变小。 延迟控制单元将延迟量限制在预定极限值内。

公开(公告)号：US07519097B2

公开(公告)日：2009-04-14

申请号：US10279394

申请日：2002-10-24

申请人： Yasuyuki Oishi ,  Tokuro Kubo ,  Kazuo Nagatani

发明人： Yasuyuki Oishi ,  Tokuro Kubo ,  Kazuo Nagatani

IPC分类号： H04B7/216

CPC分类号： H04L5/06

摘要： The invention relates to a spread-signal multiplexing circuit for frequency-multiplexing a plurality of spread signals that were generated in parallel according to the SSMA scheme. An object of the invention is to adapt to various degrees of multiplicity and to keep the SN ratio and the power efficiency high. To this end, a spread-signal multiplexing circuit of the invention comprises an amplitude monitoring part for multiplexing a plurality of spread signals and determining amplitude of a resulting signal in time-series order; a delaying part for delaying the spread signals in parallel by a time that is equal to a propagation delay time of the amplitude monitoring part; and a multiplexing part for generating a multiplexed signal by multiplexing the delayed spread signals while weighting the delayed spread signals in parallel using weights that are smaller as an average value of the determined amplitude is larger.

摘要翻译： 本发明涉及一种用于对根据SSMA方案并行生成的多个扩展信号进行频率复用的扩展信号复用电路。 本发明的一个目的是适应不同程度的多重性，并保持SN比和功率效率。 为此，本发明的扩展信号复用电路包括用于多路复用多个扩展信号并且以时间顺序确定所得信号的幅度的幅度监视部分; 延迟部分，用于将扩展信号并行延迟等于振幅监测部分的传播延迟时间的时间; 以及复用部分，用于通过多路复用延迟的扩展信号来产生多路复用信号，同时使用作为所确定的幅度的平均值较小的权重来并行加权延迟的扩展信号。