Unbounded transactional memory system and method
    11.
    发明授权
    Unbounded transactional memory system and method 有权
    无界交易记忆体系及方法

    公开(公告)号:US08706973B2

    公开(公告)日:2014-04-22

    申请号:US12964128

    申请日:2010-12-09

    IPC分类号: G06F12/00

    摘要: An unbounded transactional memory system which can process overflow data. The unbounded transactional memory system may include a host processor, a memory, and a memory processor. The host processor may include an execution unit to perform a transaction, and a cache to temporarily store data. The memory processor may store overflow data in overflow storage included in the memory in response to an overflow event in which the overflow data is generated in the cache during the transaction.

    摘要翻译: 一个可以处理溢出数据的无界事务内存系统。 无界交易存储器系统可以包括主处理器,存储器和存储器处理器。 主处理器可以包括用于执行事务的执行单元和用于临时存储数据的高速缓存。 存储器处理器可以响应于在事务期间在高速缓存中产生溢出数据的溢出事件来存储包含在存储器中的溢出存储器中的溢出数据。

    METHOD AND APPARATUS FOR TRANSFORMING PROGRAM CODE
    12.
    发明申请
    METHOD AND APPARATUS FOR TRANSFORMING PROGRAM CODE 有权
    用于转换程序代码的方法和装置

    公开(公告)号:US20110161944A1

    公开(公告)日:2011-06-30

    申请号:US12977786

    申请日:2010-12-23

    IPC分类号: G06F9/45

    CPC分类号: G06F8/458 G06F8/433 G06F8/456

    摘要: Provided is a method of transforming program code written such that a plurality of work-items are allocated respectively to and concurrently executed on a plurality of processing elements included in a computing unit. A program code translator may identify, in the program code, two or more code regions, which are to be enclosed by work-item coalescing loops (WCLs), based on a synchronization barrier function contained in the program code, such that the work-items are serially executable on a smaller number of processing elements than a number of the processing elements, and may enclose the identified code regions with the WCLs, respectively.

    摘要翻译: 提供了一种将被写入的程序代码变换为分别被分配并且在包括在计算单元中的多个处理元素并行执行的方法。 程序代码转换器可以基于程序代码中包含的同步屏障功能,在程序代码中识别要由工作项合并循环(WCL)包围的两个或多个代码区域, 项目可以在比处理元件的数量少的处理元件上串行执行,并且可以分别用WCL包围所识别的代码区域。

    Looking ahead bytecode stream to generate and update prediction information in branch target buffer for branching from the end of preceding bytecode handler to the beginning of current bytecode handler
    15.
    发明授权
    Looking ahead bytecode stream to generate and update prediction information in branch target buffer for branching from the end of preceding bytecode handler to the beginning of current bytecode handler 有权
    展望字节码流,以生成和更新分支目标缓冲区中的预测信息,以便从前一个字节码处理程序的末尾到当前字节码处理程序的开头

    公开(公告)号:US09158545B2

    公开(公告)日:2015-10-13

    申请号:US13276083

    申请日:2011-10-18

    IPC分类号: G06F9/32 G06F9/38 G06F9/455

    摘要: A bytecode interpreter is provided. The interpreter assists in branch prediction by a host processor reducing branch misprediction and achieving high performance. The bytecode branch processor includes an interpreter configured to process a program in a bytecode format in a virtual machine, a branch information generator configured to obtain, while a predefined number of bytecodes are read prior to a current bytecode being processed by the interpreter, a branch address and a target address of a predicted path of a branch corresponding to a preceding bytecode, the branch address being of a branch code included in a preceding handler that processes the preceding bytecode, and the target address being of a current handler that processes the current bytecode to which the preceding handler branches, and a branch target buffer updater configured to update a branch target buffer in the bytecode branch processor with the obtained branch address and target address.

    摘要翻译: 提供了一个字节码解释器。 解释器协助主机处理器进行分支预测,减少分支错误预测并实现高性能。 字节码分支处理器包括被配置为在虚拟机中处理字节码格式的程序的解释器,分支信息生成器,被配置为获得在解译器正在处理的当前字节码之前读取预定数量的字节码时,分支 地址和对应于前一字节码的分支的预测路径的目标地址,所述分支地址是处理前一字节码的前一处理程序中包括的分支代码,并且目标地址是处理当前处理程序的当前处理程序 以及分支目标缓冲器更新器,其被配置为利用所获得的分支地址和目标地址来更新所述字节码分支处理器中的分支目标缓冲器。

    Method and apparatus for transforming program code
    16.
    发明授权
    Method and apparatus for transforming program code 有权
    用于转换程序代码的方法和装置

    公开(公告)号:US09015683B2

    公开(公告)日:2015-04-21

    申请号:US12977786

    申请日:2010-12-23

    IPC分类号: G06F9/44 G06F9/45

    CPC分类号: G06F8/458 G06F8/433 G06F8/456

    摘要: Provided is a method of transforming program code written such that a plurality of work-items are allocated respectively to and concurrently executed on a plurality of processing elements included in a computing unit. A program code translator may identify, in the program code, two or more code regions, which are to be enclosed by work-item coalescing loops (WCLs), based on a synchronization barrier function contained in the program code, such that the work-items are serially executable on a smaller number of processing elements than a number of the processing elements, and may enclose the identified code regions with the WCLs, respectively.

    摘要翻译: 提供了一种将被写入的程序代码变换为分别被分配并且在包括在计算单元中的多个处理元素并行执行的方法。 程序代码转换器可以基于程序代码中包含的同步屏障功能,在程序代码中识别要由工作项合并循环(WCL)包围的两个或多个代码区域, 项目可以在比处理元件的数量少的处理元件上串行执行,并且可以分别用WCL包围所识别的代码区域。

    UNBOUNDED TRANSACTIONAL MEMORY SYSTEM AND METHOD
    17.
    发明申请
    UNBOUNDED TRANSACTIONAL MEMORY SYSTEM AND METHOD 有权
    无关紧要的交易记忆系统和方法

    公开(公告)号:US20110167222A1

    公开(公告)日:2011-07-07

    申请号:US12964128

    申请日:2010-12-09

    IPC分类号: G06F12/08

    摘要: An unbounded transactional memory system which can process overflow data. The unbounded transactional memory system may include a host processor, a memory, and a memory processor. The host processor may include an execution unit to perform a transaction, and a cache to temporarily store data. The memory processor may store overflow data in overflow storage included in the memory in response to an overflow event in which the overflow data is generated in the cache during the transaction.

    摘要翻译: 一个可以处理溢出数据的无界事务内存系统。 无界交易存储器系统可以包括主处理器,存储器和存储器处理器。 主处理器可以包括用于执行事务的执行单元和用于临时存储数据的高速缓存。 存储器处理器可以响应于在事务期间在高速缓存中产生溢出数据的溢出事件来存储包含在存储器中的溢出存储器中的溢出数据。

    Line signal analyzing method for use in an electronic switching system
    18.
    发明授权
    Line signal analyzing method for use in an electronic switching system 失效
    用于电子交换系统的线路信号分析方法

    公开(公告)号:US5881052A

    公开(公告)日:1999-03-09

    申请号:US755538

    申请日:1996-11-21

    申请人: Seung-Mo Cho

    发明人: Seung-Mo Cho

    CPC分类号: H04M3/32

    摘要: A method for use in an electronic switching system (ESS) analyzes M.times.N sets of line signals communicating between itself and at least one other ESS. At a first step, two previous sending and receiving line signals for a voice channel from each of the two ESS's are provided as a first pair of line signals. At a second step, two current sending and receiving line signals from each of the two ESS's form a second pair of line signals. At a third step, each of the line signals in the second pair is compared with its corresponding line signal in the first pair to check whether at least one line signal in the second pair is different from the corresponding line signal in the first pair. At a fourth step, if the checked result is negative, the second and the third steps are repeated for a predetermined duration, and if otherwise, a time interval value between one of the line signals in the second pair and its corresponding different line signal in the first pair is calculated. At a fifth step, it is checked that the calculated time interval value exists within its corresponding range among a predetermined set of ranges of time duration of line signals of the channel to determine the status of the different line signal in the first pair. At a final step, the steps from the second to the fifth are repeated until all of M.times.N sets of line signals of N voice channels are processed.

    摘要翻译: 一种用于电子交换系统(ESS)的方法分析了在其自身与至少一个其他ESS之间通信的MxN组线路信号。 在第一步骤中,提供来自两个ESS中的每一个的语音信道的两个先前的发送和接收线路信号作为第一对线路信号。 在第二步,来自两个ESS中的每一个的两个当前发送和接收线路信号形成第二对线路信号。 在第三步骤中,将第二对中的每个线路信号与第一对中的相应线路信号进行比较,以检查第二对中的至少一个线路信号是否与第一对中的相应线路信号不同。 在第四步骤中,如果检查结果为负,则第二步骤和第三步骤重复预定的持续时间,否则,第二对中的一条线路信号与其对应的不同线路信号之间的时间间隔值 计算第一对。 在第五步骤中,检查计算出的时间间隔值是否存在于通道的线路信号的预定持续时间范围内的对应范围内,以确定第一对中的不同线路信号的状态。 在最后一步,重复从第二到第五步的步骤,直到处理N个话音信道的所有M×N组线路信号。