摘要:
A bytecode interpreter is provided. The interpreter assists in branch prediction by a host processor reducing branch misprediction and achieving high performance. The bytecode branch processor includes an interpreter configured to process a program in a bytecode format in a virtual machine, a branch information generator configured to obtain, while a predefined number of bytecodes are read prior to a current bytecode being processed by the interpreter, a branch address and a target address of a predicted path of a branch corresponding to a preceding bytecode, the branch address being of a branch code included in a preceding handler that processes the preceding bytecode, and the target address being of a current handler that processes the current bytecode to which the preceding handler branches, and a branch target buffer updater configured to update a branch target buffer in the bytecode branch processor with the obtained branch address and target address.
摘要:
A bytecode interpreter in a computing system is provided. The interpreter assists in branch prediction by a host processor that processes a virtual machine such as JAVA® and DALVIK®, thereby reducing branch misprediction and achieving high performance.
摘要:
An apparatus and method of caching a frame is provided. The method of caching a frame includes receiving information on a frame to be cached from a main storage unit, setting an initial value of a specified mode using the received information, and caching the frame from the main storage unit using the specified mode.
摘要:
Provided is an code rearranger and method for a virtual machine that uses a just-in-time-compiler (JITC) to manage a location of machine code stored in a code cache. The apparatus may rearrange consecutively-executable machine codes from among those stored in the code cache to be placed successively.
摘要:
Provided is an code rearranger and method for a virtual machine that uses a just-in-time-compiler (JITC) to manage a location of machine code stored in a code cache. The apparatus may rearrange consecutively-executable machine codes from among those stored in the code cache to be placed successively.
摘要:
A text recognition region detecting apparatus and a text recognition method are provided. A text recognition region is detected by expanding a region based on a user-specified position that is input through a simple manipulation by a user. A text recognition is performed on the detected text recognition region, thereby relieving a user from having to precisely input the text region and ensuring the user's convenience.
摘要:
In a virtual machine that uses a just-in-time complier (JITC) as a software execution environment, an idle time of a core to which the JITC is allocated is utilized to generate machine code in advance, thereby reducing a load on an interpreter. Accordingly, code execution performance of the interpreter is improved, and the utilization of a multi-core system that executes applications is increased.
摘要:
In a virtual machine that uses a just-in-time complier (JITC) as a software execution environment, an idle time of a core to which the JITC is allocated is utilized to generate machine code in advance, thereby reducing a load on an interpreter. Accordingly, code execution performance of the interpreter is improved, and the utilization of a multi-core system that executes applications is increased.
摘要:
A multimedia data preprocessing apparatus for a virtual machine is provided. The multimedia data preprocessing apparatus includes a detection unit configured to detect multimedia data included in an application, a generation unit configured to generate a thread for processing the detected multimedia data, and an allocation unit configured to allocate the generated thread to an idle core.
摘要:
A multimedia data preprocessing apparatus for a virtual machine is provided. The multimedia data preprocessing apparatus includes a detection unit configured to detect multimedia data included in an application, a generation unit configured to generate a thread for processing the detected multimedia data, and an allocation unit configured to allocate the generated thread to an idle core.