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公开(公告)号:US20230420506A1
公开(公告)日:2023-12-28
申请号:US17847075
申请日:2022-06-22
发明人: Wei Ju LEE , Chun-Fu CHENG , Chung-Wei WU , Zhiqiang WU
IPC分类号: H01L29/06 , H01L29/423 , H01L29/775 , H01L29/417 , H01L29/66 , H01L29/786 , H01L21/8234
CPC分类号: H01L29/0673 , H01L29/42392 , H01L29/775 , H01L29/41733 , H01L29/66439 , H01L29/78618 , H01L29/78696 , H01L29/0649 , H01L21/823412 , H01L21/823418 , H01L21/823481
摘要: A method includes forming a channel region above a (110)-orientated substrate and having a length extending in a direction; epitaxial growing a plurality of source/drain regions on either side the channel region; forming a gate structure surrounding the channel region; forming a plurality of source/drain contacts on the source/drain regions.
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12.
公开(公告)号:US20220359682A1
公开(公告)日:2022-11-10
申请号:US17308617
申请日:2021-05-05
发明人: Wei Ju LEE , Chun-Fu CHENG , Chung-Wei WU , Zhiqiang WU
IPC分类号: H01L29/417 , H01L27/092 , H01L29/08 , H01L29/45 , H01L21/285 , H01L21/8238
摘要: Semiconductor device includes substrate having fins, first S/D feature comprising first epitaxial layer contacting first fin, second epitaxial layer on first epitaxial layer, third epitaxial layer on second epitaxial layer, third epitaxial layer comprising center and edge portion higher than center portion, and fourth epitaxial layer on third epitaxial layer, second S/D feature adjacent first S/D feature and comprising first epitaxial layer contacting second fin, second epitaxial layer on first epitaxial layer of second S/D feature, third epitaxial layer on second epitaxial layer of second S/D feature, third epitaxial layer comprising center and edge portion higher than center portion of third epitaxial layer, center and edge portions of third epitaxial layer of first and second S/D features are merging, and fourth epitaxial layer on third epitaxial layer of second S/D feature, S/D contact covering edge and center portions of third epitaxial layers of first and second S/D features.
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公开(公告)号:US20220165842A1
公开(公告)日:2022-05-26
申请号:US17104666
申请日:2020-11-25
发明人: Chih-Ching Wang , Wen-Hsing Hsieh , Jon-Hsu HO , Wen-Yuan Chen , Chia-Ying Su , Chung-Wei WU , Zhiqiang Wu
IPC分类号: H01L29/06 , H01L29/10 , H01L29/08 , H01L29/423 , H01L29/16
摘要: Embodiments relate to a semiconductor device structure including a first channel layer having a first surface and a second surface, a second channel layer having a first surface and a second surface, and the first and second channel layers are formed of a first material. The structure also includes a first dopant suppression layer in contact with the second surface of the first channel layer, and a second dopant suppression layer parallel to the first dopant suppression layer. The second dopant suppression layer is in contact with the first surface of the second channel layer, and the first and second dopant suppression layers each comprises carbon or fluorine. The structure further includes a gate dielectric layer in contact with the first and second dopant suppression layers and the first surface of the first channel layer, and a gate electrode layer disposed on the gate dielectric layer.
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