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公开(公告)号:US10083796B2
公开(公告)日:2018-09-25
申请号:US15380346
申请日:2016-12-15
Applicant: Taiyo Yuden Co., Ltd.
Inventor: Yoichi Kato , Kotaro Mizuno , Yukihiro Konishi
CPC classification number: H01G4/30 , H01G4/005 , H01G4/12 , H01G4/1227 , H01G4/232 , H01G4/2325
Abstract: A multi-layer ceramic capacitor includes a multi-layer unit, side margins, and bonding units. The multi-layer unit includes ceramic layers laminated in a first direction and internal electrodes disposed between the ceramic layers. The side margins cover the multi-layer unit from a second direction orthogonal to the first direction. The bonding units are each disposed between the multi-layer unit and each of the side margins and have higher silicon content than the ceramic layers and the side margins.
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公开(公告)号:US10020117B2
公开(公告)日:2018-07-10
申请号:US15390090
申请日:2016-12-23
Applicant: Taiyo Yuden Co., Ltd.
Inventor: Kotaro Mizuno , Yukihiro Konishi , Yoichi Kato
CPC classification number: H01G4/308 , H01G4/12 , H01G4/1227 , H01G4/1236 , H01G4/232 , H01G4/248 , H01G4/30
Abstract: A multi-layer ceramic capacitor includes a multi-layer unit, a side margin, and a bonding unit. The multi-layer unit includes ceramic layers and internal electrodes. The ceramic layers are made of first ceramics and laminated in a first direction, the first ceramics having a first average crystal grain diameter. The internal electrodes are disposed between the ceramic layers. The side margin is made of second ceramics and covers the multi-layer unit from a second direction orthogonal to the first direction, the second ceramics having a second average crystal grain diameter. The bonding unit is made of third ceramics and disposed between the multi-layer unit and the side margin, the third ceramics having a third average crystal grain diameter that is larger than the first average crystal grain diameter and the second average crystal grain diameter.
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公开(公告)号:US20170243697A1
公开(公告)日:2017-08-24
申请号:US15390090
申请日:2016-12-23
Applicant: Taiyo Yuden Co., Ltd.
Inventor: Kotaro Mizuno , Yukihiro Konishi , Yoichi Kato
CPC classification number: H01G4/308 , H01G4/12 , H01G4/1227 , H01G4/1236 , H01G4/232 , H01G4/248 , H01G4/30
Abstract: A multi-layer ceramic capacitor includes a multi-layer unit, a side margin, and a bonding unit. The multi-layer unit includes ceramic layers and internal electrodes. The ceramic layers are made of first ceramics and laminated in a first direction, the first ceramics having a first average crystal grain diameter. The internal electrodes are disposed between the ceramic layers. The side margin is made of second ceramics and covers the multi-layer unit from a second direction orthogonal to the first direction, the second ceramics having a second average crystal grain diameter. The bonding unit is made of third ceramics and disposed between the multi-layer unit and the side margin, the third ceramics having a third average crystal grain diameter that is larger than the first average crystal grain diameter and the second average crystal grain diameter.
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公开(公告)号:US12020870B2
公开(公告)日:2024-06-25
申请号:US18147185
申请日:2022-12-28
Applicant: Taiyo Yuden Co., Ltd.
Inventor: Yoichi Kato
CPC classification number: H01G4/30 , H01G4/012 , H01G4/1227 , H01G4/1236 , H01G4/1245 , H01G4/232 , H01G4/248
Abstract: A multi-layer ceramic capacitor includes a first region, a second region, a multi-layer unit, and a side margin. In the first region, crystal grains including intragranular pores are dispersed. In the second region, crystal grains including intragranular pores are not dispersed. The multi-layer unit includes ceramic layers that are laminated in a first direction and include the second region, and internal electrodes disposed between the ceramic layers. The side margin covers the multi-layer unit from a second direction orthogonal to the first direction and includes a region, the region being adjacent to the multi-layer unit and including the first region.
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公开(公告)号:US11948753B2
公开(公告)日:2024-04-02
申请号:US18327805
申请日:2023-06-01
Applicant: TAIYO YUDEN CO., LTD.
Inventor: Kazuki Yamada , Kotaro Mizuno , Yoichi Kato , Hidetoshi Masuda
IPC: H01G4/30 , C04B35/468 , H01G4/008 , H01G4/012 , H01G4/12
CPC classification number: H01G4/30 , C04B35/4682 , H01G4/008 , H01G4/012 , H01G4/1218 , C04B2235/65
Abstract: A manufacturing method of a multilayer ceramic electronic device includes: forming each of stack units by forming each of internal electrode patterns on each of dielectric green sheets, the each of internal electrode patterns including Ni, Sn and Au; forming a multilayer structure by stacking the each of stack units; and firing the multilayer structure, whereby each internal electrode layer is formed from the each of internal electrode patterns and each dielectric layer is formed from the each of the dielectric green sheets wherein, in the each internal electrode layer, an Au concentration near each interface between the each internal electrode layer and the each dielectric layer is larger than an Au concentration in each center portion in a thickness direction.
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公开(公告)号:US11848157B2
公开(公告)日:2023-12-19
申请号:US17694148
申请日:2022-03-14
Applicant: TAIYO YUDEN CO., LTD.
Inventor: Yoichi Kato
CPC classification number: H01G4/1218 , C04B35/64 , H01G4/008 , H01G4/012 , H01G4/30
Abstract: A ceramic electronic device includes a multilayer structure in which each of a plurality of internal electrode layers and each of three or more of dielectric layers of which a main component is ceramic are alternately stacked. The three or more of dielectric layers include Sn. A dielectric layer having a smaller Sn concentration is closer to an outermost end in a stacking direction than a dielectric layer having a larger Sn concentration and being located on a center side of the stacking direction, in a relationship of at least two of the three or more of dielectric layers.
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公开(公告)号:US11664167B2
公开(公告)日:2023-05-30
申请号:US17104682
申请日:2020-11-25
Applicant: Taiyo Yuden Co., Ltd.
Inventor: Yoichi Kato
CPC classification number: H01G4/30 , H01G4/008 , H01G4/012 , H01G4/1218
Abstract: A multi-layer ceramic electronic component includes: a multi-layer unit including ceramic layers laminated in a direction of a first axis, internal electrodes disposed between the ceramic layers, and first and second side surfaces on which end portions of the internal electrodes in a direction of a second axis orthogonal to the first axis are positioned; and first and second side margins that cover the first and second side surfaces, respectively. When the first and second side margins are each divided equally into first and second regions along a plane perpendicular to the direction of the first axis, the first side margin has a larger average thickness in the first region than in the second region, and the second side margin has a larger average thickness in the second region than in the first region.
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公开(公告)号:US11437194B2
公开(公告)日:2022-09-06
申请号:US16874581
申请日:2020-05-14
Applicant: TAIYO YUDEN CO., LTD.
Inventor: Yoichi Kato
Abstract: A multi-layer ceramic electronic component includes a multi-layer unit and a side margin. The multi-layer unit includes ceramic layers laminated in a first direction, and internal electrodes disposed between the ceramic layers, positions of end portions of the internal electrodes in a second direction orthogonal to the first direction being aligned with one another within a range of 0.5 μm in the second direction. The side margin includes a center portion in the first direction and a third direction orthogonal to the first direction and the second direction, and corner portions in the first direction and the third direction, the corner portions having a lower porosity than a porosity of the center portion, the side margin covering the multi-layer unit from the second direction.
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公开(公告)号:US10366831B2
公开(公告)日:2019-07-30
申请号:US15004845
申请日:2016-01-22
Applicant: TAIYO YUDEN CO., LTD.
Inventor: Kotaro Mizuno , Yoichi Kato , Yukihiro Konishi
Abstract: A multilayer capacitor has dielectric layers and multiple internal electrode layers. The laminate includes a stack of multiple dielectric layers made of dielectric material and has a first principal face and a second principal face on the opposite side of the first principal face. In an embodiment, the multiple internal electrode layers have Ni as a primary component, contain at least one metal element selected from Pt, Ru, Rh, Re, Ir, Os, and Pd, and are arranged in parallel with the first principal face and second principal face inside the laminate in such a way that they alternate from the opposing sides with the dielectric layers placed in between, wherein each of the internal electrode layer closest to the first principal face and the internal electrode layer closest to the second principal face has a distance of 30 μm or less from the corresponding principal face.
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公开(公告)号:US10269498B2
公开(公告)日:2019-04-23
申请号:US15833493
申请日:2017-12-06
Applicant: Taiyo Yuden Co., Ltd.
Inventor: Yoichi Kato
Abstract: A multi-layer ceramic capacitor includes a body. The body includes a capacitance forming unit, a cover, and a side margin. The capacitance forming unit includes ceramic layers laminated in a first direction and internal electrodes disposed between the ceramic layers. The cover covers the capacitance forming unit from the first direction. The side margin covers the capacitance forming unit from a second direction orthogonal to the first direction. The capacitance forming unit includes a surface layer portion adjacent to the cover. Ends of the internal electrodes in the second direction in the surface layer portion are curved toward the cover.
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