Abstract:
A multi-layer ceramic electronic component, including: a capacitance forming unit that includes internal electrodes and ceramic layers, the internal electrodes being laminated in a first direction via the ceramic layers; and a circumferential unit that is provided on a circumference of the capacitance forming unit and formed of insulating ceramics. The circumferential unit includes a cover that is provided to the capacitance forming unit outward in the first direction, a side margin that is provided to the capacitance forming unit outward in a second direction orthogonal to the first direction, and a grain growth region that is formed at a boundary between the cover and the side margin and includes crystal grains of the insulating ceramics, the crystal grains having a mean grain size larger than a mean grain size of the crystal grains at a center portion of the cover.
Abstract:
A multilayer ceramic capacitor includes an element body of roughly rectangular solid shape which is constituted by dielectric layers alternately stacked with internal electrode layers having different polarities, with a pair of cover layers formed on it to cover the top and bottom faces in the direction of lamination of the foregoing, and which has a pair of principal faces, a pair of end faces, and a pair of side faces, wherein external electrodes are formed on the pair of end faces and at least one of the pair of principal faces of the element body, and Tt representing the thickness of the external electrode and Tc representing the thickness of the cover layer satisfy the relationship of 1/30≤Tt/Tc≤4/5, and the thickness of the cover layers, or Tc, is 10 μm or more but 30 μm or less.
Abstract:
A multi-layer ceramic electronic component, including: a capacitance forming unit that includes internal electrodes and ceramic layers, the internal electrodes being laminated in a first direction via the ceramic layers; and a circumferential unit that is provided on a circumference of the capacitance forming unit and formed of insulating ceramics. The circumferential unit includes a cover that is provided to the capacitance forming unit outward in the first direction, a side margin that is provided to the capacitance forming unit outward in a second direction orthogonal to the first direction, and a grain growth region that is formed at a boundary between the cover and the side margin and includes crystal grains of the insulating ceramics, the crystal grains having a mean grain size larger than a mean grain size of the crystal grains at a center portion of the cover.
Abstract:
A multi-layer ceramic capacitor includes a multi-layer unit, side margins, and bonding units. The multi-layer unit includes ceramic layers laminated in a first direction and internal electrodes disposed between the ceramic layers. The side margins cover the multi-layer unit from a second direction orthogonal to the first direction. The bonding units are each disposed between the multi-layer unit and each of the side margins and have higher silicon content than the ceramic layers and the side margins.
Abstract:
A multi-layer ceramic capacitor according to an embodiment of the present invention includes a multi-layer, side margins and offset sections. The multi-layer includes internal electrodes and dielectric layers alternately laminated. The side margins are configured of a dielectric and disposed to cover side faces of the multi-layer. The offset sections are made with amorphous areas or gap areas. The offset sections are formed between the internal electrodes and the side margins such that ends at side faces of the internal electrodes are offset from the side faces to an inward direction of the multi-layer.
Abstract:
A ceramic electronic device includes a multilayer chip in which a plurality of dielectric layers of which a main component is ceramic and a plurality of internal electrode layers are stacked. The plurality of internal electrode layers include Ni, Sn and Au.
Abstract:
A multi-layer ceramic capacitor includes a first region, a second region, a multi-layer unit, and a side margin. In the first region, crystal grains including intragranular pores are dispersed. In the second region, crystal grains including intragranular pores are not dispersed. The multi-layer unit includes ceramic layers that are laminated in a first direction and include the second region, and internal electrodes disposed between the ceramic layers. The side margin covers the multi-layer unit from a second direction orthogonal to the first direction and includes a region, the region being adjacent to the multi-layer unit and including the first region.
Abstract:
A multi-layer ceramic capacitor includes: a first region including a polycrystal including, as a main component, crystal grains free from intragranular pores; a second region that includes a polycrystal including, as a main component, crystal grains including intragranular pores and includes a higher content of silicon than a content of silicon in the first region; a capacitance forming unit including ceramic layers laminated along a first direction, and internal electrodes disposed between the ceramic layers; and a protective portion including a cover that covers the capacitance forming unit and constitutes a main surface facing in the first direction, a side margin constituting a side surface facing in a second direction orthogonal to the first direction, and a ridge constituting a connection portion, the connection portion connecting the main surface and the side surface to each other. The ceramic layers include the first region. The ridge includes the second region.
Abstract:
A multi-layer ceramic electronic component includes a multi-layer unit and a side margin. The multi-layer unit includes ceramic layers laminated in a first direction, internal electrodes disposed between the ceramic layers, a main surface that faces in the first direction, and a side surface that faces in a second direction orthogonal to the first direction, the internal electrodes being exposed from the side surface. The side margin includes a side-surface-covering portion that is disposed on the side surface, and an end portion that extends from the side-surface-covering portion to an upper side of the main surface, the end portion having a lower porosity than a porosity of the side-surface-covering portion, the end portion being rounded.
Abstract:
In an embodiment, one length-direction end of each first internal electrode layer 111a is connected to the first conductor layer 112 of the capacitor body 110 over a connection width equivalent to the width of each first internal electrode layer 111a, while the other length-direction end of each second internal electrode layer 111b is connected to the second conductor layer 113 over a connection width equivalent to the width of each second internal electrode layer 111b. One height-direction end of the first conductor layer 112 is connected to the first external electrode 120 over a connection width equivalent to the width of the first conductor layer 112, while one height-direction end of the second conductor layer 113 is connected to the second external electrode 130 over a connection width equivalent to the width of the second conductor layer 113.