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公开(公告)号:US20210327829A1
公开(公告)日:2021-10-21
申请号:US16850620
申请日:2020-04-16
Applicant: Texas Instruments Incorporated
Inventor: Vivek Swaminathan Sridharan , Yiqi Tang , Christopher Daniel Manack , Rajen Manicon Murugan , Liang Wan , Hiep Xuan Nguyen
IPC: H01L23/60 , H01L23/495 , H01L33/62 , H01L23/00 , H01L33/00
Abstract: A system in a package (SIP) includes carrier layer regions that have a dielectric material with a metal post therethrough, where adjacent carrier layer regions define a gap. A driver IC die is positioned in the gap having nodes connected to bond pads exposed by openings in a top side of a first passivation layer, with the bond pads facing up. A dielectric layer is on the first passivation layer and carrier layer region that includes filled through vias coupled to the bond pads and to the metal post. A light blocking layer is on sidewalls and a bottom of the substrate. A first device includes a light emitter that has first bondable features. The light blocking layer can block at least 90% of incident light. The first bondable features are flipchip mounted to a first portion of the bond pads.
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公开(公告)号:US20190157110A1
公开(公告)日:2019-05-23
申请号:US16254059
申请日:2019-01-22
Applicant: Texas Instruments Incorporated
Inventor: Hiep Xuan Nguyen
CPC classification number: H01L21/561 , H01L21/565 , H01L21/6835 , H01L23/3121 , H01L23/49537 , H01L24/48 , H01L24/85 , H01L24/97 , H01L2224/45099 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/73265 , H01L2224/85005 , H01L2224/97 , H01L2924/00014 , H01L2924/14 , H01L2924/15311 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/3511 , H01L2224/85
Abstract: An integrated circuit (“IC”) package mold includes an upper mold platen that defines an upper mold cavity for receiving an upper substrate having a die attach side with a plurality of dies mounted thereon and a non-attach side with no dies mounted thereon. The die attach side of the upper substrate faces upwardly. A lower mold platen defines a lower mold cavity for receiving a lower substrate having a die attach side with a plurality dies mounted thereon and a non-attach side with no dies mounted thereon. The die attach side of the lower substrate faces downwardly.
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