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    USB BATTERY CHARGING MODE ADVERTISING AND DIFFERENTIATION
    11.
    发明申请
    USB BATTERY CHARGING MODE ADVERTISING AND DIFFERENTIATION 有权

    公开(公告)号：US20220103000A1

    公开(公告)日：2022-03-31

    申请号：US17485001

    申请日：2021-09-24

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Suzanne Mary VINING

    IPC: H02J7/00 ,  G01R19/10

    Abstract: A method includes determining a charging port mode by receiving a data contact detect (DCD) Complete signal, reducing a voltage on a first data pin of a Universal Serial Bus (USB) connector of a portable device, and determining that a condition is true when a voltage on a second data pin of the USB connector is equal to or greater than 0.8 to 2.0 Volts (V), and is false otherwise. When the condition is true, a first signal is sent on a control circuit output indicating indicate that the PD is connected to a dedicated charging port (DCP) of Divider 0 mode. When the condition is false, a second signal is sent on the control circuit output indicating that the PD is connected to a DCP of 1.2V short mode.

    SERIAL BUS REPEATER WITH LOW POWER STATE DETECTION
    12.
    发明申请
    SERIAL BUS REPEATER WITH LOW POWER STATE DETECTION 有权

    公开(公告)号：US20210311902A1

    公开(公告)日：2021-10-07

    申请号：US17348813

    申请日：2021-06-16

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Win Naing MAUNG ,  Suzanne Mary VINING

    IPC: G06F13/42 ,  G06F1/3206 ,  G06F13/38

    Abstract: A serial bus repeater includes a port circuit and a low power state detection circuit. The port circuit is configured to communicate via a serial bus. The low power state detection circuit includes a power state transaction identification circuit and a bus state identification circuit. The power state transaction identification circuit is configured to identify a power state transaction on the serial bus. The power state transaction is indicative of entering a reduced power state. The bus state identification circuit is configured to identify a value of termination resistance on the serial bus that is indicative of entering the reduced power state.

    CONFIGURABLE SERIAL COMMUNICATION HUB
    15.
    发明申请
    CONFIGURABLE SERIAL COMMUNICATION HUB 有权
    可配置串行通信总线

    公开(公告)号：US20160371206A1

    公开(公告)日：2016-12-22

    申请号：US15186076

    申请日：2016-06-17

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Win Naing MAUNG ,  Charles Michael CAMPBELL ,  Suzanne Mary VINING

    IPC: G06F13/20 ,  G06F13/42 ,  G06F13/10

    CPC classification number: G06F13/20 ,  G06F13/102 ,  G06F13/4282 ,  Y02D10/14 ,  Y02D10/151

    Abstract: An apparatus and method for configuring a serial communication hub are disclosed herein. A serial communication hub includes an upstream port, a plurality of downstream ports, and a port controller. The port controller is configured to: arrange each of a first of the downstream ports and a second of the downstream ports to individually operate as a first type of serial communication interface; and to arrange the first of the downstream ports and the second of the downstream ports to operate in combination as a second type of serial communication interface.

    Abstract translation: 本文公开了一种用于配置串行通信集线器的装置和方法。 串行通信集线器包括上行端口，多个下行端口和端口控制器。 端口控制器被配置为：排列第一下游端口中的每一个和下游端口中的第二个单独地作为第一类型的串行通信接口操作; 并且将第一下游端口和第二下游端口配置为组合作为第二类型的串行通信接口。

    SERIAL BUS SIGNAL CONDITIONER
    17.
    发明申请
    SERIAL BUS SIGNAL CONDITIONER 有权

    公开(公告)号：US20210311903A1

    公开(公告)日：2021-10-07

    申请号：US17347920

    申请日：2021-06-15

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Win Naing MAUNG ,  Suzanne Mary VINING ,  Yonghui TANG ,  Douglas Edward WENTE ,  Huanzhang HUANG

    IPC: G06F13/42

    Abstract: A serial bus signal conditioner circuit includes receiver circuitry, a mode identification circuit, and an edge-rate booster circuit. The receiver circuitry is configured to receive signals transmitted on a serial bus. The mode identification circuit is coupled to the receiver circuitry, and is configured to identify initiation of or return to high-speed signaling on the serial bus based on sequences of the signals transmitted on the serial bus. The edge-rate booster circuit is coupled to the mode identification circuit, and is configured to identify edges of a differential signal transmitted on the serial bus, and to supply a differential current to the serial bus based on identification of an edge of the differential signal.

    BI-LEVEL ADAPTIVE EQUALIZER
    19.
    发明申请
    BI-LEVEL ADAPTIVE EQUALIZER 有权

    公开(公告)号：US20210075650A1

    公开(公告)日：2021-03-11

    申请号：US16778955

    申请日：2020-01-31

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Amit RANE ,  Charles Michael CAMPBELL ,  Suzanne Mary VINING

    IPC: H04L25/03 ,  H04L7/00

    Abstract: At least some aspects of the present disclosure provide for a method. In at least one examples, the method includes applying first equalization to a received data signal to generate an equalizer signal and comparing the equalized signal to each of a plurality of reference voltages for a predetermined period of time per respective reference voltage to generate a comparison result. The method further includes determining a plurality of counts with each count of the plurality of counts uniquely corresponding to a number of rising edges in the comparison result for each of the plurality of reference voltages. The method further includes comparing at least one of the plurality of counts to at least another of the plurality of counts to determine a relationship among the plurality of counts and applying second equalization to the received data signal based on the determined relationship among the plurality of counts.

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