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    ADJUSTABLE EMBEDDED UNIVERSAL SERIAL BUS 2 LOW-IMPEDANCE DRIVING DURATION
    1.
    发明申请
    ADJUSTABLE EMBEDDED UNIVERSAL SERIAL BUS 2 LOW-IMPEDANCE DRIVING DURATION 有权

    公开(公告)号：US20210311898A1

    公开(公告)日：2021-10-07

    申请号：US17347882

    申请日：2021-06-15

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Win Naing MAUNG ,  Yonghui TANG ,  Huanzhang HUANG ,  Douglas Edward WENTE

    IPC: G06F13/40 ,  G06F13/42

    Abstract: Aspects of the present disclosure provide for a system. In at least some examples, the system includes an embedded Universal Serial Bus 2 (eUSB2) device having a first receiver and a first transmitter, a processor, a second transmitter coupled to the processor, a second receiver coupled to the processor, a drive low circuit coupled to the processor second transmitter, and differential signal lines having a length greater than ten inches. The differential signal lines are coupled at a first end to the first receiver and the first transmitter and at a second end to the second transmitter and the second receiver. The processor is configured to control the drive low circuit to drive the differential signal lines low with a logic ‘0’ to cause the first receiver to receive the logic ‘0’ and a value of a signal present on the differential signal lines to reach about 0 volts.

    EMBEDDED UNIVERSAL SERIAL BUS 2 REPEATER
    2.
    发明申请
    EMBEDDED UNIVERSAL SERIAL BUS 2 REPEATER 审中-公开

    公开(公告)号：US20200073839A1

    公开(公告)日：2020-03-05

    申请号：US16404494

    申请日：2019-05-06

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Win Naing MAUNG ,  Douglas Edward WENTE ,  Mustafa Ulvi ERDOGAN ,  Huanzhang HUANG ,  Saurabh GOYAL ,  Bhupendra SHARMA

    IPC: G06F13/38 ,  G06F13/42 ,  H04B3/36

    Abstract: Aspects of the disclosure provide for a circuit including a squelch detector having a first input coupled to a first node and configured to receive a positive component of a differential signal with a floating center tap, a second input coupled to a second node and configured to receive a negative component of the differential signal, and an output coupled to a logic circuit, a first resistor coupled between the first node and a third node, a second resistor coupled between the third node and the second node, a third resistor coupled between the first node and a fourth node, a fourth resistor coupled between the fourth node and the second node, a capacitor coupled between the fourth node and a ground terminal, a comparator having a first input coupled to the third node, a second input coupled to a fifth node, and an output coupled to the logic circuit.

    REDRIVER CAPABLE OF SWITCHING BETWEEN LINEAR AND LIMITED MODES
    5.
    发明申请
    REDRIVER CAPABLE OF SWITCHING BETWEEN LINEAR AND LIMITED MODES 有权

    公开(公告)号：US20220150445A1

    公开(公告)日：2022-05-12

    申请号：US17363158

    申请日：2021-06-30

    Applicant: Texas Instruments Incorporated

    Inventor： Charles Michael CAMPBELL ,  Mustafa Ulvi ERDOGAN ,  Douglas Edward WENTE ,  Sridhar RAMASWAMY

    IPC: H04N7/10 ,  H04N21/4363 ,  H04N21/442

    Abstract: A redriver system adapted for coupling to a first device and to a second device includes first and second transmitter drivers and a snoop circuit. The first transmitter driver has a first enable input. The second transmitter driver has a second enable input. The snoop circuit is coupled to the first and second enable inputs. The snoop circuit is configured to determine whether the first device and the second device are to operate according to a first protocol. Responsive to the snoop circuit determining that the first and second devices are to operate according to the first protocol, the snoop circuit enables the first transmitter driver and disables the second transmitter driver. Responsive to the snoop circuit determining that the first and second devices are not to operate according to the first protocol, the snoop circuit disables the first transmitter driver and enables the second transmitter driver.

    SERIAL BUS SIGNAL CONDITIONER
    7.
    发明申请
    SERIAL BUS SIGNAL CONDITIONER 审中-公开

    公开(公告)号：US20200242071A1

    公开(公告)日：2020-07-30

    申请号：US16751411

    申请日：2020-01-24

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Win Naing MAUNG ,  Suzanne Mary VINING ,  Yonghui TANG ,  Douglas Edward WENTE ,  Huanzhang HUANG

    IPC: G06F13/42

    Abstract: A serial bus signal conditioner circuit includes receiver circuitry, a mode identification circuit, and an edge-rate booster circuit. The receiver circuitry is configured to receive signals transmitted on a serial bus. The mode identification circuit is coupled to the receiver circuitry, and is configured to identify initiation of or return to high-speed signaling on the serial bus based on sequences of the signals transmitted on the serial bus. The edge-rate booster circuit is coupled to the mode identification circuit, and is configured to identify edges of a differential signal transmitted on the serial bus, and to supply a differential current to the serial bus based on identification of an edge of the differential signal.

    SERIAL BUS SIGNAL CONDITIONER
    8.
    发明申请
    SERIAL BUS SIGNAL CONDITIONER 有权

    公开(公告)号：US20210311903A1

    公开(公告)日：2021-10-07

    申请号：US17347920

    申请日：2021-06-15

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Win Naing MAUNG ,  Suzanne Mary VINING ,  Yonghui TANG ,  Douglas Edward WENTE ,  Huanzhang HUANG

    IPC: G06F13/42

    Abstract: A serial bus signal conditioner circuit includes receiver circuitry, a mode identification circuit, and an edge-rate booster circuit. The receiver circuitry is configured to receive signals transmitted on a serial bus. The mode identification circuit is coupled to the receiver circuitry, and is configured to identify initiation of or return to high-speed signaling on the serial bus based on sequences of the signals transmitted on the serial bus. The edge-rate booster circuit is coupled to the mode identification circuit, and is configured to identify edges of a differential signal transmitted on the serial bus, and to supply a differential current to the serial bus based on identification of an edge of the differential signal.

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