-
公开(公告)号:US20200212899A1
公开(公告)日:2020-07-02
申请号:US16585155
申请日:2019-09-27
Applicant: Texas Instruments Incorporated
Inventor: Tolga Dinc , Salvatore Luciano Finocchiaro , Gerd Schuppener , Siraj Akhtar , Swaminathan Sankaran , Baher Haroun
Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to provide phase imbalance correction. An example system includes a phase detector to obtain a first signal and generate a first output, a comparator coupled to the phase detector, the comparator to generate a second output based on the first output, and an amplifier coupled to the comparator, the amplifier to adjust a first phase response of the first signal based on the second output.
-
公开(公告)号:US20250096450A1
公开(公告)日:2025-03-20
申请号:US18966557
申请日:2024-12-03
Applicant: Texas Instruments Incorporated
Inventor: Tolga Dinc , Swaminathan Sankaran , Sachin Kalia
IPC: H01P5/18
Abstract: An on-chip directional coupler includes a first linear conductive trace, a second linear conductive trace, and a conductive loop. The first linear conductive trace including an end and a coupled port. The second linear conductive trace is spaced apart from and parallel to the first linear conductive trace. The second linear conductive trace includes an end and an isolated port. The conductive loop includes a first end conductively coupled to the end of the first linear conductive trace, and a second end conductively coupled to the end of the second linear conductive trace.
-
公开(公告)号:US20240223168A1
公开(公告)日:2024-07-04
申请号:US18148845
申请日:2022-12-30
Applicant: Texas Instruments Incorporated
Inventor: Tolga Dinc , Sachin Kalia , Swaminathan Sankaran
CPC classification number: H03K5/00006 , G06F1/08 , H03H7/0115 , H03H7/0161
Abstract: Described embodiments include a circuit having a quadrature phase generator circuit having differential generator inputs, in-phase differential generator outputs and quadrature-phase differential generator outputs. A first frequency multiplier circuit has first differential multiplier inputs and a first multiplier output, wherein the first differential multiplier inputs are coupled to the in-phase differential generator outputs. A second frequency multiplier circuit has second differential multiplier inputs and a second multiplier output. The second multiplier differential inputs are coupled to the quadrature-phase differential generator outputs. A transformer includes a primary inductor and a secondary inductor, wherein the primary inductor is coupled between the first and second multiplier outputs, and the second inductor is coupled between an output voltage terminal and a ground terminal.
-
公开(公告)号:US20240178877A1
公开(公告)日:2024-05-30
申请号:US18072667
申请日:2022-11-30
Applicant: Texas Instruments Incorporated
Inventor: Tolga Dinc , Sachin Kalia , Swaminathan Sankaran
IPC: H04B1/44 , H03K17/687
CPC classification number: H04B1/44 , H03K17/6871
Abstract: In described examples, a multi-terminal switch includes first and second switches, and first, second, and third inductors. The first switch and first inductor are coupled between first terminals, the second switch and second inductor are coupled between second terminals, and the third inductor is coupled between third terminals. In a first mode, the first switch is opened and the second switch is closed. Opening the first switch and closing the second switch enables a first connection between the first terminals and the third terminals via a first magnetic coupling between the first and third inductors. In a second mode, the first switch is closed and the second switch is opened. Closing the first switch and opening the second switch enables a second connection between the second terminals and the third terminals via a second magnetic coupling between the second and third inductors.
-
公开(公告)号:US11652446B2
公开(公告)日:2023-05-16
申请号:US17694953
申请日:2022-03-15
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Sachin Kalia , Tolga Dinc , Swaminathan Sankaran
CPC classification number: H03D7/1458 , H03D7/125 , H03D7/1433 , H03D7/1441 , H03D7/16
Abstract: A frequency multiplier includes an input section having inputs to receive an input signal having an input frequency, a mixer section, and an output section magnetically coupled to the input section and generating an output signal in response to the input signal. The mixer section may be coupled to the input section by a common mode node forming a path for a common mode current to flow to the mixer section and be magnetically coupled to the common mode node. The input section may generate a signal current, and the mixer section may be magnetically coupled to the input section and be directly capacitively coupled to the input section through a capacitor in a signal current path. The mixer section may have differential inputs capacitively coupled to the input section and also be coupled to the input section through a current path. A current helper section may be coupled to the current path.
-
公开(公告)号:US11368124B1
公开(公告)日:2022-06-21
申请号:US17189556
申请日:2021-03-02
Applicant: Texas Instruments Incorporated
Inventor: Sachin Kalia , Tolga Dinc , Bichoy Bahr , Swaminathan Sankaran
Abstract: An oscillator includes: a bulk-acoustic wave (BAW) resonator having a first BAW resonator terminal and a second BAW resonator terminal; and an active circuit coupled to the first and second BAW resonator terminals and having a series resonance topology with: a first transistor; a second transistor; a first resistor; a second resistor; a capacitive network coupled to first and second BAW resonator terminals and to respective current terminals of the first and second transistors; and an inductor having a first inductor terminal and a second inductor terminal, the first inductor terminal coupled to the capacitive network, and the second inductor terminal coupled to ground terminal.
-
公开(公告)号:US20210376838A1
公开(公告)日:2021-12-02
申请号:US17397954
申请日:2021-08-09
Applicant: Texas Instruments Incorporated
Inventor: Salvatore Luciano Finocchiaro , Tolga Dinc , Gerd Schuppener , Siraj Akhtar , Swaminathan Sankaran , Baher Haroun
Abstract: In described examples, a method of operating a charge pump includes a first control signal deactivating a first transistor, and the first control signal's logical complement activating a second transistor to reset the first transistor's DC bias voltage. The first control signal's logical complement deactivates the second transistor, and the first control signal provides a bias voltage to the first transistor to activate it, causing current to be transmitted from an input voltage to an output terminal. A second control signal deactivates a third transistor, and the second control signal's logical complement activates a fourth transistor to reset the second transistor's DC bias voltage. The second control signal's logical complement deactivates the fourth transistor, and the second control signal provides a bias voltage to the third transistor to activate it, causing current to be transmitted from the output terminal to a ground.
-
-
-
-
-
-