ARCHITECTURE TO MITIGATE OVERSHOOT/UNDERSHOOT IN A VOLTAGE REGULATOR

    公开(公告)号:US20220209648A1

    公开(公告)日:2022-06-30

    申请号:US17137446

    申请日:2020-12-30

    Abstract: In described examples, a controller includes a converter. The converter generates a first signal responsive to an input signal. A summing block is coupled to the converter. The summing block receives the first signal and generates a second signal. A limiter is coupled to the summing block and generates a third signal responsive to the second signal and a code signal. A logic block generates a target signal responsive to the third signal. The third signal transitions to an intermediate level at a first slew rate and the third signal transitions from the intermediate level to the target signal at a second slew rate.

    Configurable circuit telemetry system

    公开(公告)号:US11283935B2

    公开(公告)日:2022-03-22

    申请号:US16730776

    申请日:2019-12-30

    Abstract: Aspects of the disclosure provide for a circuit, in some examples, including a storage element, a co-processor, and a telemetry sequencer coupled to the storage element and the co-processor. The telemetry sequencer is configured to implement a digital state machine to receive configuration information indicating a type of telemetry data for generation, retrieve operations and operands, where the operations and the operands define a sequential series of actions for execution to generate the telemetry data, drive the co-processor with the operations and the operands by passing some of the operations and some of the operands to the co-processor for processing by the co-processor, receive, from the co-processor, and store an intermediate output of the series of actions as the telemetry data in a first format, and receive, from the co-processor, and store a final output of the series of actions as the telemetry data in a second format.

    SYNTHETIC CURRENT COMPENSATION IN SWITCHED POWER CONVERTERS

    公开(公告)号:US20250062700A1

    公开(公告)日:2025-02-20

    申请号:US18451363

    申请日:2023-08-17

    Abstract: A power controller comprises a control loop configured to control timing of pulsed signals that activate phases of a coupled inductor voltage regulator based on current demand of a load circuit and comprises a transient detection circuit configured to determine a projected current through a compensation inductor of the coupled inductor voltage regulator based on a state of the phases and operating parameters of the coupled inductor voltage regulator. The transient detection circuit is configured to detect a transient in the current demand of the load circuit based on a variability in phase-to-phase overlap of the pulsed signals. Responsive to detecting the transient, the transient detection circuit is configured to apply a correction to the control loop that alters the timing of the pulsed signals based on the projected current through the compensation inductor.

    PERFORMANCE OF MULTIPHASE VOLTAGE REGULATOR
    17.
    发明公开

    公开(公告)号:US20240364221A1

    公开(公告)日:2024-10-31

    申请号:US18224818

    申请日:2023-07-21

    CPC classification number: H02M3/1584 H02M1/0009 H02M1/0025 H02M3/157

    Abstract: At least one example describes mechanisms to improve performance of a multiphase voltage regulator. In at least one example, an integrated circuit is provided which includes control circuitry coupled to a first power stage and a second power stage. The first power stage and a second power stage are coupled to an output power supply rail, wherein the control circuitry generates a first pulse width modulated signal for the first power stage and a second pulse width modulated signal for the second power stage. In at least one example, the control circuitry aligns rise and fall times of the first pulse width modulated signal and the second pulse width modulated signal based on an undershoot condition being detected on the output power supply rail.

    Configurable circuit telemetry system

    公开(公告)号:US11700336B2

    公开(公告)日:2023-07-11

    申请号:US17592643

    申请日:2022-02-04

    CPC classification number: H04M11/002 A61N1/37252 G01R19/12 G06F9/3877

    Abstract: Aspects of the disclosure provide for a circuit, in some examples, including a storage element, a co-processor, and a telemetry sequencer coupled to the storage element and the co-processor. The telemetry sequencer is configured to implement a digital state machine to receive configuration information indicating a type of telemetry data for generation, retrieve operations and operands, where the operations and the operands define a sequential series of actions for execution to generate the telemetry data, drive the co-processor with the operations and the operands by passing some of the operations and some of the operands to the co-processor for processing by the co-processor, receive, from the co-processor, and store an intermediate output of the series of actions as the telemetry data in a first format, and receive, from the co-processor, and store a final output of the series of actions as the telemetry data in a second format.

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