公开(公告)号：US20220399434A1

公开(公告)日：2022-12-15

申请号：US17828891

申请日：2022-05-31

Applicant: Texas Instruments Incorporated

Inventor： Yanbiao Pan ,  Pushpa Mahalingam

IPC: H01L49/02 ,  H01L29/04 ,  H01L29/167 ,  H01L21/265

Abstract: An integrated circuit includes a dielectric isolation structure formed at a surface of a semiconductor substrate and a polysilicon resistor body formed on the dielectric isolation structure. The polysilicon resistor body includes an N-type dopant having an N-type dopant concentration, nitrogen having a nitrogen concentration, and carbon having a carbon concentration. The sheet resistance of the resistor body is greater than 5 kΩ/square.

公开(公告)号：US20220077324A1

公开(公告)日：2022-03-10

申请号：US17528716

申请日：2021-11-17

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Binghua Hu ,  Yanbiao Pan ,  Django Trombley

IPC: H01L29/94 ,  H01L29/66

Abstract: A semiconductor device includes an integrated trench capacitor in a substrate, with a field oxide layer on the substrate. The trench capacitor includes trenches extending into semiconductor material of the substrate, and a capacitor dielectric in the trenches on the semiconductor material. The trench capacitor further includes an electrically conductive trench-fill material on the capacitor dielectric. A portion of the capacitor dielectric extends into the field oxide layer, between a first segment of the field oxide layer over the trench-fill material and a second segment of the field oxide layer over the semiconductor material. The integrated trench capacitor has a trench contact to the trench-fill material in each of the trenches, and substrate contacts to the semiconductor material around the trenches, with no substrate contacts between the trenches.

公开(公告)号：US11195958B2

公开(公告)日：2021-12-07

申请号：US17023639

申请日：2020-09-17

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Binghua Hu ,  Alexei Sadovnikov ,  Abbas Ali ,  Yanbiao Pan ,  Stefan Herzer

IPC: H01L29/66 ,  H01L29/94 ,  H01L29/08 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/423

Abstract: A semiconductor device with an isolation structure and a trench capacitor, each formed using a single resist mask for etching corresponding first and second trenches of different widths and different depths, with dielectric liners formed on the trench sidewalls and polysilicon filling the trenches and deep doped regions surrounding the trenches, including conductive features of a metallization structure that connect the polysilicon of the isolation structure trench to the deep doped region to form an isolation structure.

公开(公告)号：US20250006836A1

公开(公告)日：2025-01-02

申请号：US18344769

申请日：2023-06-29

Applicant: Texas Instruments Incorporated

Inventor： Jackson Bauer ,  Yanbiao Pan ,  Bhaskar Srinivasan ,  Pushpa Mahalingam

IPC: H01L29/78 ,  H01L21/762 ,  H01L29/66

Abstract: Semiconductor devices including a nitrogen doped field relief dielectric layer are described. The microelectronic device comprises a substrate including a body region having a first conductivity type and a drain drift region having a second conductivity type opposite the first conductivity type; a gate dielectric layer on the substrate, the gate dielectric layer extending over the body region and the drift region and a doped field relief dielectric layer on the drift region. Doping of the field relief dielectric layer with nitrogen raises the dielectric constant of the field relief dielectric above that of pure silicon dioxide. Increasing the dielectric constant of the field relief dielectric layer may improve channel hot carrier performance, improve breakdown voltage, and reduce the specific on resistance of the microelectronic device compared to a microelectronic device of similar size with a field relief dielectric which is not doped with nitrogen.

公开(公告)号：US11222986B2

公开(公告)日：2022-01-11

申请号：US16939823

申请日：2020-07-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Binghua Hu ,  Yanbiao Pan ,  Django Trombley

IPC: H01L29/94 ,  H01L29/66

Abstract: A semiconductor device includes an integrated trench capacitor in a substrate, with a field oxide layer on the substrate. The trench capacitor includes trenches extending into semiconductor material of the substrate, and a capacitor dielectric in the trenches on the semiconductor material. The trench capacitor further includes an electrically conductive trench-fill material on the capacitor dielectric. A portion of the capacitor dielectric extends into the field oxide layer, between a first segment of the field oxide layer over the trench-fill material and a second segment of the field oxide layer over the semiconductor material. The integrated trench capacitor has a trench contact to the trench-fill material in each of the trenches, and substrate contacts to the semiconductor material around the trenches, with no substrate contacts between the trenches.

公开(公告)号：US10811543B2

公开(公告)日：2020-10-20

申请号：US16232322

申请日：2018-12-26

Applicant: Texas Instruments Incorporated

Inventor： Binghua Hu ,  Alexei Sadovnikov ,  Abbas Ali ,  Yanbiao Pan ,  Stefan Herzer

IPC: H01L21/02 ,  H01L29/94 ,  H01L29/08 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66

Abstract: A semiconductor device with an isolation structure and a trench capacitor, each formed using a single resist mask for etching corresponding first and second trenches of different widths and different depths, with dielectric liners formed on the trench sidewalls and polysilicon filling the trenches and deep doped regions surrounding the trenches, including conductive features of a metallization structure that connect the polysilicon of the isolation structure trench to the deep doped region to form an isolation structure.

公开(公告)号：US20200212229A1

公开(公告)日：2020-07-02

申请号：US16232322

申请日：2018-12-26

Applicant: Texas Instruments Incorporated

Inventor： Binghua Hu ,  Alexei Sadovnikov ,  Abbas Ali ,  Yanbiao Pan ,  Stefan Herzer

IPC: H01L29/94 ,  H01L29/08 ,  H01L29/66 ,  H01L29/06 ,  H01L29/423 ,  H01L21/8238

Abstract: A semiconductor device with an isolation structure and a trench capacitor, each formed using a single resist mask for etching corresponding first and second trenches of different widths and different depths, with dielectric liners formed on the trench sidewalls and polysilicon filling the trenches and deep doped regions surrounding the trenches, including conductive features of a metallization structure that connect the polysilicon of the isolation structure trench to the deep doped region to form an isolation structure.