公开(公告)号：US20170256513A1

公开(公告)日：2017-09-07

申请号：US15596392

申请日：2017-05-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chien Ling Hwang ,  Yeong-Jyh Lin ,  Bor-Ping Jang ,  Hsiao-Chung Liang

IPC: H01L23/00 ,  H01L23/14 ,  H01L23/498 ,  H01L25/10 ,  H01L21/48

CPC classification number: H01L24/14 ,  H01L21/4853 ,  H01L23/147 ,  H01L23/49811 ,  H01L24/29 ,  H01L24/32 ,  H01L25/105 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/157 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3841 ,  H01L2924/0665 ,  H01L2924/00

Abstract: The present disclosure relates to a semiconductor device. In some embodiments, the semiconductor device has a first plurality of conductive pads arranged over a first substrate. A conductive solder material is arranged over and is electrically connected to the first plurality of conductive pads. A first boundary structure separates each conductive pad of the first plurality of conductive pads from an adjacent conductive pad of the first plurality of conductive pads. A die is arranged over the first substrate. The die has outermost sidewalls that are laterally separated from first and second ones of the first plurality of conductive pads by the first boundary structure.

公开(公告)号：US09129899B2

公开(公告)日：2015-09-08

申请号：US13944257

申请日：2013-07-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chien-Ling Hwang ,  Bor-Ping Jang ,  Hsin-Hung Liao ,  Chung-Shi Liu

IPC: H01L21/302 ,  H01L21/306 ,  H01L21/308

CPC classification number: H01L21/3083 ,  H01L21/30604 ,  H01L21/3081 ,  H01L21/6708 ,  H01L21/682 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L2221/68327 ,  H01L2221/6834

Abstract: Embodiments of a method for thinning a wafer are provided. The method includes placing a wafer on a support assembly and securing an etching mask to a backside of the wafer. The etching mask covers a peripheral portion of the wafer. The method further includes performing a wet etching process on the backside of the wafer to form a thinned wafer, and the thinned wafer includes peripheral portions having a first thickness and a central portion having a second thickness smaller than the first thickness. Embodiments of system for forming the thinned wafer are also provided.

Abstract translation: 提供了一种用于薄化晶片的方法的实施例。 该方法包括将晶片放置在支撑组件上并将蚀刻掩模固定到晶片的背面。 蚀刻掩模覆盖晶片的周边部分。 该方法还包括在晶片的背面执行湿蚀刻处理以形成薄的晶片，并且薄化的晶片包括具有第一厚度的周边部分和具有小于第一厚度的第二厚度的中心部分。 还提供了用于形成薄化晶片的系统的实施例。