公开(公告)号：US09082617B2

公开(公告)日：2015-07-14

申请号：US14109314

申请日：2013-12-17

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Po-Yuan Su ,  Hung-Ta Huang ,  Ping-Hao Lin ,  Hung-Che Liao ,  Hung-Yu Chiu ,  Chao-Hsuan Pan ,  Wen-Tsung Chen ,  Chih-Ming Huang

IPC: H01L23/60 ,  H01L27/02 ,  H01L27/06 ,  H01L21/8238

CPC classification number: H01L27/0255 ,  H01L21/823871 ,  H01L21/823878 ,  H01L21/823892 ,  H01L27/0262

Abstract: An integrated circuit and a method of fabricating the integrated circuit are provided. In various embodiments, the integrated circuit includes a semiconductor substrate, at least one deep n-well in the semiconductor substrate, at least one p-channel metal-oxide-semiconductor transistor in the deep n-well, at least one n-channel metal-oxide-semiconductor transistor outside of the deep n-well, an first interconnect structure, and a protection component. Both of the p-channel metal-oxide-semiconductor transistor and the n-channel metal-oxide-semiconductor transistor are disposed in the semiconductor substrate, and are electrically coupled by the first interconnect structure. The protection component is disposed in the semiconductor substrate, wherein the protection component is electrically coupled to the deep n-well.

Abstract translation: 提供集成电路和制造集成电路的方法。 在各种实施例中，集成电路包括半导体衬底，半导体衬底中的至少一个深n阱，深n阱中的至少一个p沟道金属氧化物半导体晶体管，至少一个n沟道金属 氧化物半导体晶体管，深n阱外，第一互连结构和保护部件。 p沟道金属氧化物半导体晶体管和n沟道金属氧化物半导体晶体管都设置在半导体衬底中，并通过第一互连结构电耦合。 保护元件设置在半导体衬底中，其中保护元件电耦合到深n阱。

公开(公告)号：US12021099B2

公开(公告)日：2024-06-25

申请号：US16994963

申请日：2020-08-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shih-Hsun Hsu ,  Ping-Hao Lin

IPC: H01L27/146

CPC classification number: H01L27/14623 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14658

Abstract: In some embodiments, an image sensor is provided. The image sensor comprises a first photodetector disposed within a front-side surface of a semiconductor substrate. A trench isolation structure is disposed over a back-side surface of the semiconductor substrate. The trench isolation structure includes a buffer layer and a dielectric liner. The buffer layer covers the back-side surface of the semiconductor substrate and fills trenches that extend downward into the back-side surface of the semiconductor substrate. The dielectric liner is disposed between the buffer layer and the semiconductor substrate. A composite grid structure has composite grid segments that are aligned over the trenches, respectively. The buffer layer separates the dielectric liner from the composite grid structure. A light shield structure is disposed within the buffer layer and directly overlies the first photodetector.

公开(公告)号：US20190148146A1

公开(公告)日：2019-05-16

申请号：US16175819

申请日：2018-10-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ping-Hao Lin ,  Fu-Cheng Chang

IPC: H01L21/033 ,  H01L21/027 ,  H01L21/311 ,  G03F7/20

Abstract: A method of forming a semiconductor structure is disclosed. A multi-layer structure is formed over a substrate. A photoresist stack with a stepped sidewall is formed on the multi-layer structure. A pattern of the photoresist stack is transferred to the multi-layer structure.

公开(公告)号：US20190103428A1

公开(公告)日：2019-04-04

申请号：US16017078

申请日：2018-06-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Yu Wei ,  Hsin-Chi Chen ,  Kuo-Cheng Lee ,  Ping-Hao Lin ,  Hsun-Ying Huang ,  Yen-Liang Lin ,  Yu Ting Kao

IPC: H01L27/146

Abstract: The present disclosure relates to a CMOS image sensor, and an associated method of formation. In some embodiments, the CMOS image sensor comprises a floating diffusion region disposed at one side of a transfer gate within a substrate and a photo detecting column disposed at the other side of the transfer gate opposing to the floating diffusion region within the substrate. The photo detecting column comprises a doped sensing layer with a doping type opposite to that of the substrate. The photo detecting column and the substrate are in contact with each other at a junction interface comprising one or more recessed portions. By forming the junction interface with recessed portions, the junction interface is enlarged compared to a previous p-n junction interface without recessed portions, and thus a full well capacity of the photodiode structure is improved.