公开(公告)号：US20190252559A1

公开(公告)日：2019-08-15

申请号：US16390080

申请日：2019-04-22

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Hsin-Hsiang Tseng ,  Chih-Fei Lee ,  Chia-Pin Cheng ,  Fu-Cheng Chang

IPC: H01L31/0216 ,  H01L31/112 ,  H01L27/146 ,  H01L31/0232

CPC classification number: H01L31/02162 ,  H01L27/14643 ,  H01L27/14683 ,  H01L31/0232 ,  H01L31/1125 ,  Y02E10/50 ,  Y02P70/521

Abstract: A method of forming a semiconductor device includes forming a photo sensing region in a semiconductor substrate, wherein the semiconductor substrate is of a first type dopant and the photo sensing region is of a second type dopant that has a different conductivity type than the first type dopant; forming a nanostructure layer in contact with an interface between the photo sensing region and the semiconductor substrate; and etching the nanostructure layer until exposing the photo sensing region to form a plurality of nanostructures.

公开(公告)号：US10269990B2

公开(公告)日：2019-04-23

申请号：US15469646

申请日：2017-03-27

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Hsin-Hsiang Tseng ,  Chih-Fei Lee ,  Chia-Pin Cheng ,  Fu-Cheng Chang

IPC: H01L31/0216 ,  H01L31/0232 ,  H01L27/146 ,  H01L31/112

Abstract: A semiconductor device is provided, which includes a substrate and at least one nanostructure. The substrate has sensing pixels, and each of the sensing pixels has a photo sensing region for absorbing incident light. The nanostructure is directly on the photo sensing region. The nanostructure of each of the sensing pixels has a projected portion on an upper surface of the substrate, and a circle equivalent diameter of the projected portion of the nanostructure of each of the sensing pixels is substantially within a wavelength range of 100 nm to 1900 nm of the incident light configured to enter the substrate through the nanostructure.

公开(公告)号：US20180301496A1

公开(公告)日：2018-10-18

申请号：US15487573

申请日：2017-04-14

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Che-Chun Lu ,  Ching-Hung Kao ,  Fu-Cheng Chang ,  Chia-Pin Cheng ,  Po-Chun Chiu

IPC: H01L27/146

CPC classification number: H01L27/14643 ,  H01L27/1461 ,  H01L27/14612 ,  H01L27/14632 ,  H01L27/14636 ,  H01L27/14687 ,  H01L27/14689

Abstract: A semiconductor device includes a substrate and a device. The substrate has a first surface and a second surface opposite to each other. The substrate includes a first well region, and the first well region includes a first shallow implantation region adjacent to the first surface and a first deep implantation region adjacent to the second surface, in which a dopant concentration of the first deep implantation region at the second surface is substantially equal to 0. The device is disposed on the first surface of the substrate and adjoins the first shallow implantation region.

公开(公告)号：US09887225B2

公开(公告)日：2018-02-06

申请号：US15228071

申请日：2016-08-04

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Kuo-Hung Lee ,  Chia-Pin Cheng ,  Fu-Cheng Chang ,  Volume Chien ,  Ching-Hung Kao

IPC: H01L31/18 ,  H01L27/146

CPC classification number: H01L27/1463 ,  H01L27/14609 ,  H01L27/14614 ,  H01L27/1462 ,  H01L27/14636 ,  H01L27/14643 ,  H01L27/14689

Abstract: A semiconductor device is provided. The semiconductor device includes a semiconductor substrate. An isolation feature is disposed in the semiconductor substrate to define a pixel region and a periphery region of the semiconductor substrate. A transistor gate is formed on the semiconductor substrate in the pixel region, in which the transistor gate has a first sidewall and a second sidewall opposite to the first sidewall. A photodiode is disposed in the semiconductor substrate and adjacent to the second sidewall of the transistor gate. A patterned spacer layer is formed on the photodiode and on the transistor gate. The patterned spacer layer includes a first sidewall spacer on the first sidewall of the transistor gate, and a protective structure covering the photodiode and a top surface of the transistor gate.

公开(公告)号：US20190148146A1

公开(公告)日：2019-05-16

申请号：US16175819

申请日：2018-10-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ping-Hao Lin ,  Fu-Cheng Chang

IPC: H01L21/033 ,  H01L21/027 ,  H01L21/311 ,  G03F7/20

Abstract: A method of forming a semiconductor structure is disclosed. A multi-layer structure is formed over a substrate. A photoresist stack with a stepped sidewall is formed on the multi-layer structure. A pattern of the photoresist stack is transferred to the multi-layer structure.

公开(公告)号：US10134694B2

公开(公告)日：2018-11-20

申请号：US15160618

申请日：2016-05-20

Applicant: Taiwan Semiconductor Manufacturing CO., LTD.

Inventor： Chih-Fei Lee ,  Fu-Cheng Chang ,  Chi-Cherng Jeng ,  Hsin-Chi Chen ,  Yuan-Ko Hwang

IPC: H01L21/48 ,  H01L23/00 ,  H01L23/31 ,  H01L23/525

Abstract: A structure of an under bump metallization and a method of forming the same are provided. The under bump metallization has a redistribution via hole, viewed from the top, in a round shape or a polygon shape having an angle between adjacent edges greater than 90°. Therefore, the step coverage of the later formed metal layer can be improved.

公开(公告)号：US20180158851A1

公开(公告)日：2018-06-07

申请号：US15866745

申请日：2018-01-10

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Kuo-Hung Lee ,  Chia-Pin Cheng ,  Fu-Cheng Chang ,  Volume Chien ,  Ching-Hung Kao

IPC: H01L27/146

CPC classification number: H01L27/1463 ,  H01L27/14609 ,  H01L27/14614 ,  H01L27/1462 ,  H01L27/14636 ,  H01L27/14643 ,  H01L27/14689

Abstract: A semiconductor device is provided. The semiconductor device includes a semiconductor substrate. An isolation feature is disposed in the semiconductor substrate to define a pixel region and a periphery region of the semiconductor substrate. A transistor gate is formed on the semiconductor substrate in the pixel region, in which the transistor gate has a first sidewall and a second sidewall opposite to the first sidewall. A photodiode is disposed in the semiconductor substrate and adjacent to the second sidewall of the transistor gate. A patterned spacer layer is formed on the photodiode and on the transistor gate. The patterned spacer layer includes a first sidewall spacer on the first sidewall of the transistor gate, and a protective structure covering the photodiode and a top surface of the transistor gate.

公开(公告)号：US12243772B2

公开(公告)日：2025-03-04

申请号：US18356843

申请日：2023-07-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ssu-Chiang Weng ,  Ping-Hao Lin ,  Fu-Cheng Chang

IPC: H01L23/522 ,  H01L21/311 ,  H01L21/768 ,  H01L23/31 ,  H01L23/48 ,  H01L23/528 ,  H01L25/065

Abstract: A method includes bonding a first wafer to a second wafer. The first wafer includes a plurality of dielectric layers, a metal pipe penetrating through the plurality of dielectric layers, and a dielectric region encircled by the metal pipe. The dielectric region has a plurality of steps formed of sidewalls and top surfaces of portions of the plurality of dielectric layers that are encircled by the metal pipe. The method further includes etching the first wafer to remove the dielectric region and to leave an opening encircled by the metal pipe, extending the opening into the second wafer to reveal a metal pad in the second wafer, and filling the opening with a conductive material to form a conductive plug in the opening.

公开(公告)号：US20230402405A1

公开(公告)日：2023-12-14

申请号：US18186754

申请日：2023-03-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： I-Han Huang ,  Fu-Cheng Chang ,  Wen-Ting Lan ,  Shi Ning Ju ,  Lin-Yu Huang ,  Kuo-Cheng Chiang

IPC: H01L23/00 ,  H01L23/31

CPC classification number: H01L23/562 ,  H01L24/05 ,  H01L24/32 ,  H01L23/3128 ,  H01L2224/32157 ,  H01L2224/05188

Abstract: The present disclosure describes a method to form a semiconductor structure having an oxide structure on a wafer edge. The method includes forming a device layer on a first substrate, forming an interconnect layer on the device layer, forming an oxide structure on a top surface and along a sidewall surface of the interconnect layer, forming a bonding layer on the oxide structure and the interconnect layer, and bonding the device layer to a second substrate with the bonding layer.

公开(公告)号：US11777040B2

公开(公告)日：2023-10-03

申请号：US18070311

申请日：2022-11-28

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Hsin-Hsiang Tseng ,  Chih-Fei Lee ,  Chia-Pin Cheng ,  Fu-Cheng Chang

IPC: H01L31/0216 ,  H01L31/0232 ,  H01L27/146 ,  H01L31/112

CPC classification number: H01L31/02162 ,  H01L27/14643 ,  H01L27/14683 ,  H01L31/0232 ,  H01L31/1125 ,  Y02E10/50 ,  Y02P70/50

Abstract: A semiconductor device includes a substrate, a photo sensing region, and a plurality of semiconductor plugs. The photo sensing region is in the substrate. The photo sensing region forms a p-n junction with the substrate. The semiconductor plugs extend from above the photo sensing region into the photo sensing region.