公开(公告)号：US20190140097A1

公开(公告)日：2019-05-09

申请号：US16222322

申请日：2018-12-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kuo-Yin Lin ,  Teng-Chun Tsai ,  Po-Yu Lin

IPC: H01L29/78 ,  H01L29/10 ,  H01L21/8234 ,  H01L29/06 ,  H01L21/84 ,  H01L21/306 ,  H01L21/02 ,  H01L29/66

Abstract: A method includes providing a semiconductor substrate having first and second regions that are doped with first and second dopants respectively. The first and second dopants are of opposite types. The method further includes epitaxially growing a first semiconductor layer that is doped with a third dopant. The first and third dopants are of opposite types. The method further includes depositing a dielectric hard mask (HM) layer over the first semiconductor layer; patterning the dielectric HM layer to have an opening over the first region; extending the opening towards the semiconductor substrate; and epitaxially growing a second semiconductor layer in the opening. The second semiconductor layer is doped with a fourth dopant. The first and fourth dopants are of a same type. The method further includes removing the dielectric HM layer; and performing a first CMP process to planarize both the first and second semiconductor layers.

公开(公告)号：US20170213912A1

公开(公告)日：2017-07-27

申请号：US15226746

申请日：2016-08-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kuo-Yin Lin ,  Teng-Chun Tsai ,  Po-Yu Lin

IPC: H01L29/78 ,  H01L21/306 ,  H01L29/06 ,  H01L29/66 ,  H01L21/02

CPC classification number: H01L29/7849 ,  H01L21/02631 ,  H01L21/30625 ,  H01L21/823431 ,  H01L21/845 ,  H01L29/0649 ,  H01L29/1054 ,  H01L29/66795 ,  H01L29/7851

Abstract: A method includes providing a semiconductor substrate having first and second regions that are doped with first and second dopants respectively. The first and second dopants are of opposite types. The method further includes epitaxially growing a first semiconductor layer that is doped with a third dopant. The first and third dopants are of opposite types. The method further includes depositing a dielectric hard mask (HM) layer over the first semiconductor layer; patterning the dielectric HM layer to have an opening over the first region; extending the opening towards the semiconductor substrate; and epitaxially growing a second semiconductor layer in the opening. The second semiconductor layer is doped with a fourth dopant. The first and fourth dopants are of a same type. The method further includes removing the dielectric HM layer; and performing a first CMP process to planarize both the first and second semiconductor layers.