公开(公告)号：US11626494B2

公开(公告)日：2023-04-11

申请号：US17140663

申请日：2021-01-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Hung Chu ,  Sung-Li Wang ,  Shuen-Shin Liang ,  Hsu-Kai Chang ,  Ding-Kang Shih ,  Tsungyu Hung ,  Pang-Yen Tsai ,  Keng-Chu Lin

IPC: H01L29/417 ,  H01L23/528 ,  H01L29/06 ,  H01L29/423 ,  H01L29/45 ,  H01L29/786 ,  H01L21/02 ,  H01L21/285 ,  H01L29/66

Abstract: A semiconductor device structure according to the present disclosure includes a source feature and a drain feature, at least one channel structure extending between the source feature and the drain feature, a gate structure wrapped around each of the at least one channel structure, a semiconductor layer over the gate structure, a dielectric layer over the semiconductor layer, a doped semiconductor feature extending through the semiconductor layer and the dielectric layer to be in contact with the source feature, a metal contact plug over the doped semiconductor feature, and a buried power rail disposed over the metal contact plug.

公开(公告)号：US20240371952A1

公开(公告)日：2024-11-07

申请号：US18770393

申请日：2024-07-11

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Hung CHU ,  Tsungyu Hung ,  Hsu-Kai Chang ,  Ding-Kang Shih ,  Keng-Chu Lin ,  Pang-Yen Tsai ,  Sung-Li Wang ,  Shuen-Shin Liang

IPC: H01L29/417 ,  H01L21/285 ,  H01L29/40 ,  H01L29/423

Abstract: The present disclosure describes a method to form a semiconductor device with backside contact structures. The method includes forming a semiconductor device on a first side of a substrate. The semiconductor device includes a source/drain (S/D) region. The method further includes etching a portion of the S/D region on a second side of the substrate to form an opening and forming an epitaxial contact structure on the S/D region in the opening. The second side is opposite to the first side. The epitaxial contact structure includes a first portion in contact with the S/D region in the opening and a second portion on the first portion. A width of the second portion is larger than the first portion.

公开(公告)号：US20230386925A1

公开(公告)日：2023-11-30

申请号：US18232171

申请日：2023-08-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pei-Wei Lee ,  Pang-Yen Tsai ,  Tsungyu Hung ,  Huang-Lin Chao

IPC: H01L21/8234 ,  H01L29/66 ,  H01L29/78 ,  H01L21/02 ,  H01L21/762 ,  H01L29/423 ,  H01L29/06

CPC classification number: H01L21/823431 ,  H01L29/66795 ,  H01L29/785 ,  H01L21/02579 ,  H01L21/76275 ,  H01L21/762 ,  H01L29/42392 ,  H01L29/0673 ,  H01L29/0665 ,  H01L2029/7858

Abstract: A method of fabricating a semiconductor device with superlattice structures on a substrate with an embedded isolation structure is disclosed. The method includes forming an etch stop layer on a substrate, forming a superlattice structure on the etch stop layer, depositing an isolation layer on the superlattice structure, depositing a semiconductor layer on the isolation layer, forming a bi-layer isolation structure on the semiconductor layer, removing the substrate and the etch stop layer, etching the superlattice structure, the isolation layer, the semiconductor layer, and the bi-layer isolation structure to form a fin structure, and forming a gate-all-around structure on the fin structure.

公开(公告)号：US11830773B2

公开(公告)日：2023-11-28

申请号：US17006161

申请日：2020-08-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pei-Wei Lee ,  Pang-Yen Tsai ,  Tsungyu Hung ,  Huang-Lin Chao

IPC: H01L21/8234 ,  H01L29/66 ,  H01L29/78 ,  H01L21/762 ,  H01L21/02 ,  H01L29/06 ,  H01L29/423

CPC classification number: H01L21/823431 ,  H01L21/02579 ,  H01L21/762 ,  H01L21/76275 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/0665 ,  H01L2029/7858

Abstract: A method of fabricating a semiconductor device with superlattice structures on a substrate with an embedded isolation structure is disclosed. The method includes forming an etch stop layer on a substrate, forming a superlattice structure on the etch stop layer, depositing an isolation layer on the superlattice structure, depositing a semiconductor layer on the isolation layer, forming a bi-layer isolation structure on the semiconductor layer, removing the substrate and the etch stop layer, etching the superlattice structure, the isolation layer, the semiconductor layer, and the bi-layer isolation structure to form a fin structure, and forming a gate-all-around structure on the fin structure.

公开(公告)号：US11749742B2

公开(公告)日：2023-09-05

申请号：US17182651

申请日：2021-02-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsungyu Hung ,  Pang-Yen Tsai ,  Pei-Wei Lee

IPC: H01L29/66 ,  H01L21/02 ,  H01L27/088 ,  H01L29/78 ,  H01L29/06 ,  H01L21/306 ,  H01L29/423

CPC classification number: H01L29/66553 ,  H01L21/0217 ,  H01L21/02247 ,  H01L21/02252 ,  H01L21/02255 ,  H01L27/0886 ,  H01L29/0653 ,  H01L29/6681 ,  H01L29/66545 ,  H01L29/7853 ,  H01L21/30604 ,  H01L29/0673 ,  H01L29/42392

Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary method of forming a semiconductor device comprises forming a fin over a substrate, wherein the fin comprises a first semiconductor layer and a second semiconductor layer comprising different semiconductor materials, and the fin includes a channel region and a source/drain region; forming a dummy gate structure over the substrate and the fin; etching a portion of the fin in the source/drain region; selectively removing an edge portion of the second semiconductor layer in the channel region of the fin such that the second semiconductor layer is recessed, and an edge portion of the first semiconductor layer is suspended; performing a reflow process to the first semiconductor layer to form an inner spacer, wherein the inner spacer forms sidewall surfaces of the source/drain region of the fin; and epitaxially growing a sour/drain feature in the source/drain region.

公开(公告)号：US20200168722A1

公开(公告)日：2020-05-28

申请号：US16439909

申请日：2019-06-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsungyu Hung ,  Pang-Yen Tsai ,  Pei-Wei Lee

IPC: H01L29/66 ,  H01L21/02 ,  H01L27/088 ,  H01L29/78 ,  H01L29/06

Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary method of forming a semiconductor device comprises forming a fin over a substrate, wherein the fin comprises a first semiconductor layer and a second semiconductor layer comprising different semiconductor materials, and the fin includes a channel region and a source/drain region; forming a dummy gate structure over the substrate and the fin; etching a portion of the fin in the source/drain region; selectively removing an edge portion of the second semiconductor layer in the channel region of the fin such that the second semiconductor layer is recessed, and an edge portion of the first semiconductor layer is suspended; performing a reflow process to the first semiconductor layer to form an inner spacer, wherein the inner spacer forms sidewall surfaces of the source/drain region of the fin; and epitaxially growing a sour/drain feature in the source/drain region.