公开(公告)号：US20240266163A1

公开(公告)日：2024-08-08

申请号：US18606621

申请日：2024-03-15

申请人： Applied Materials, Inc.

发明人： Srinivas GANDIKOTA ,  Yixiong YANG ,  Jacqueline Samantha WRENCH ,  Yong YANG ,  Steven C. H. HUNG

IPC分类号： H01L21/02 ,  H01L21/28 ,  H01L21/67

CPC分类号： H01L21/02247 ,  H01L21/02043 ,  H01L21/02274 ,  H01L21/28185 ,  H01L21/28202 ,  H01L21/67023 ,  H01L21/67207

摘要： A method of forming a high-κ dielectric cap layer on a semiconductor structure formed on a substrate includes depositing the high-κ dielectric cap layer on the semiconductor structure, depositing a sacrificial silicon cap layer on the high-κ dielectric cap layer, performing a post cap anneal process to harden and densify the as-deposited high-κ dielectric cap layer, and removing the sacrificial silicon cap layer.

公开(公告)号：US12057322B2

公开(公告)日：2024-08-06

申请号：US16658620

申请日：2019-10-21

申请人： Tokyo Electron Limited ,  International Business Machines Corporation

发明人： Nicholas Joy ,  Devi Koty ,  Qingyun Yang ,  Nathan P. Marchack ,  Sebastian Ulrich Engelmann

IPC分类号： H01L21/3213 ,  H01L21/02 ,  H01L21/67 ,  H01L21/768

CPC分类号： H01L21/32136 ,  H01L21/0223 ,  H01L21/02247 ,  H01L21/67207 ,  H01L21/76805

摘要： A method of plasma processing that includes maintaining a plasma processing chamber between 10° C. to 200° C., flowing oxygen and nitrogen into the plasma processing chamber, where a ratio of a flow rate of the nitrogen to a flow rate of oxygen is between about 1:5 and about 1:1, and etching a ruthenium/osmium layer by sustaining a plasma in the plasma processing chamber.

公开(公告)号：US12040230B2

公开(公告)日：2024-07-16

申请号：US17499518

申请日：2021-10-12

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Oscar van der Straten ,  Kenneth C. K. Cheng ,  Joseph F. Maniscalco ,  Koichi Motoyama

IPC分类号： H01L21/76 ,  H01L21/02 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532

CPC分类号： H01L21/76888 ,  H01L21/02244 ,  H01L21/02247 ,  H01L21/76885 ,  H01L23/5226 ,  H01L23/53252

摘要： Integrated chips and methods of forming the same include forming a lower conductive line over an underlying layer. An upper conductive via is formed over the lower conducting lines. An encapsulating layer is formed on the lower conductive line and the upper conductive via using a treatment process that converts an outermost layer of the lower conductive line and the upper conductive via into the encapsulating layer.

公开(公告)号：US12018374B2

公开(公告)日：2024-06-25

申请号：US16813175

申请日：2020-03-09

申请人： DSGI Technologies, Inc.

发明人： Jeffrey Edward Kowalski

IPC分类号： C23C16/511 ,  C23C16/458 ,  H01J37/32 ,  H01L21/02 ,  H01L21/285

CPC分类号： C23C16/511 ,  C23C16/4588 ,  H01J37/32192 ,  H01J37/32201 ,  H01J37/32211 ,  H01J37/3222 ,  H01J37/32266 ,  H01J37/32357 ,  H01J37/32715 ,  H01J37/32733 ,  H01J37/32816 ,  H01L21/02247 ,  H01L21/02274 ,  H01L21/28556 ,  H01J2237/3321

摘要： Systems and methods of forming a thin film on substrate includes positioning the substrate in a chamber; generating, via a uniform microwave field generator, a microwave field around the substrate; and guiding radicals into the chamber so that plasma is generated about the substrate to form the thin film on the substrate.

公开(公告)号：US20240112903A1

公开(公告)日：2024-04-04

申请号：US17956157

申请日：2022-09-29

申请人： Applied Materials, Inc.

发明人： Hansel Lo ,  Chris Olsen

IPC分类号： H01L21/02

CPC分类号： H01L21/02236 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02247

摘要： Described herein is a method for selectively oxidizing a substrate. The method includes forming a non-conformal layer on at least one side surface of a trench or a hole of a substrate. After forming the non-conformal layer, the at least one trench or at least one hole may be selectively oxidized, wherein oxidation of the non-conformal layer and an exposed portion of the at least one side wall not covered by the non-conformal layer occurs to form an oxide layer. The oxide layer is thicker at a lower portion of the at least one side wall than the upper portion of the at least one side wall, such that it tapers.

公开(公告)号：US20230207315A1

公开(公告)日：2023-06-29

申请号：US17851645

申请日：2022-06-28

申请人： CHANGXIN MEMORY TECHNOLOGIES, INC.

发明人： TZUNG-HAN LEE

IPC分类号： H01L21/02 ,  H01L21/308

CPC分类号： H01L21/02614 ,  H01L21/02532 ,  H01L21/3083 ,  H01L21/02236 ,  H01L21/02247 ,  H01L21/02252

摘要： A semiconductor structure and a method for forming a semiconductor structure are provided. The method includes: a base is provided, in which the base includes a first doped area and a second doped area, and an isolation structure is provided between the first doped area and the second doped area; nitridation treatment is performed on the first doped area and the second doped area; and oxidation treatment is performed on the first doped area and the second doped area subjected to the nitridation treatment, to form a first gate oxide layer and a second gate oxide layer respectively.

公开(公告)号：US20230178418A1

公开(公告)日：2023-06-08

申请号：US17805715

申请日：2022-06-07

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shu-Wen SHEN ,  Jiun-Ming KUO ,  Yuan-Ching PENG ,  Ji-Xuan YANG ,  Jheng-Wei LIN ,  Chien-Hung CHEN

IPC分类号： H01L21/762 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L29/775 ,  H01L21/02 ,  H01L29/66

CPC分类号： H01L21/76224 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/78696 ,  H01L29/775 ,  H01L21/02603 ,  H01L21/02532 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02247 ,  H01L29/66545 ,  H01L29/66742 ,  H01L29/66439

摘要： The present disclosure provides a method of making a semiconductor device. The method includes forming a semiconductor stack on a substrate, wherein the semiconductor stack includes first semiconductor layers of a first semiconductor material and second semiconductor layers of a second semiconductor material alternatively stacked on the substrate; patterning the semiconductor stack and the substrate to form a trench and an active region being adjacent the trench; epitaxially growing a liner of the first semiconductor material on sidewalls of the trench and sidewalls of the active region; forming an isolation feature in the trench; performing a rapid thermal nitridation process, thereby converting the liner into a silicon nitride layer; and forming a cladding layer of the second semiconductor material over the silicon nitride layer.

公开(公告)号：US20230154748A1

公开(公告)日：2023-05-18

申请号：US17766771

申请日：2020-10-08

申请人： SHIN-ETSU HANDOTAI CO., LTD.

发明人： Miho NIITANI ,  Taishi WAKABAYASHI ,  Kento YAMADA ,  Kazuhiko YOSHIDA

IPC分类号： H01L21/02 ,  H01L21/762 ,  C30B25/18 ,  C30B29/06

CPC分类号： H01L21/02488 ,  H01L21/0217 ,  H01L21/02433 ,  H01L21/02247 ,  H01L21/02381 ,  H01L21/7624 ,  H01L21/02255 ,  C30B25/186 ,  C30B29/06 ,  C30B25/183 ,  H01L21/02532 ,  H01L21/0254 ,  H01L21/0262 ,  H01L27/1203

摘要： A method for manufacturing a semiconductor substrate by forming an insulator film and a semiconductor single crystal layer on a surface of a silicon single crystal substrate to manufacture a semiconductor substrate having the semiconductor single crystal layer on the insulator film, the method including at least the steps of: forming a silicon nitride film having an epitaxial relationship with the silicon single crystal substrate on the surface of the silicon single crystal substrate as the insulator film by subjecting the silicon single crystal substrate to a heat treatment under a nitrogen gas-containing atmosphere; and forming the semiconductor single crystal layer on the silicon nitride film by epitaxial growth. This makes it possible to obtain a semiconductor substrate by simple method with high productivity at low cost even when the insulator film provided between the silicon single crystal substrate and the semiconductor single crystal layer is a silicon nitride film.

公开(公告)号：US20180212040A1

公开(公告)日：2018-07-26

申请号：US15918199

申请日：2018-03-12

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Ruqiang Bao ,  Hemanth Jagannathan ,  Paul C. Jamison ,  ChoongHyun Lee

IPC分类号： H01L29/66 ,  H01L29/786 ,  H01L21/02 ,  H01L21/324 ,  H01L29/423

CPC分类号： H01L29/66553 ,  H01L21/02247 ,  H01L21/02252 ,  H01L21/324 ,  H01L29/42384 ,  H01L29/42392 ,  H01L29/4908 ,  H01L29/66666 ,  H01L29/66772 ,  H01L29/7827 ,  H01L29/78618 ,  H01L29/78642 ,  H01L29/78696

摘要： A method of forming a vertical fin field effect transistor device, including, forming one or more vertical fins with a hardmask cap on each vertical fin on a substrate, forming a fin liner on the one or more vertical fins and hardmask caps, forming a sacrificial liner on the fin liner, and forming a bottom spacer layer on the sacrificial liner.

公开(公告)号：US20180145143A1

公开(公告)日：2018-05-24

申请号：US15357675

申请日：2016-11-21

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chia-Cheng Chen ,  Liang-Yin Chen ,  Xiong-Fei Yu ,  Syun-Ming Jang ,  Hui-Cheng Chang ,  Meng-Shu Lin

IPC分类号： H01L29/423 ,  H01L21/8234 ,  H01L29/51 ,  H01L27/088 ,  H01L21/28 ,  H01L21/02 ,  H01L29/78

CPC分类号： H01L29/518 ,  H01L21/0214 ,  H01L21/0223 ,  H01L21/02247 ,  H01L21/02255 ,  H01L21/28202 ,  H01L21/823431 ,  H01L21/823462 ,  H01L27/0886 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/7851 ,  H01L29/7856

摘要： An embodiment fin field-effect-transistor (finFET) includes a semiconductor fin comprising a channel region and a gate oxide on a sidewall and a top surface of the channel region. The gate oxide includes a thinnest portion having a first thickness and a thickest portion having a second thickness different than the first thickness. A difference between the first thickness and the second thickness is less than a maximum thickness variation, and the maximum thickness variation is in accordance with an operating voltage of the finFET.