公开(公告)号：US10115690B2

公开(公告)日：2018-10-30

申请号：US14632654

申请日：2015-02-26

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Ying-Jui Huang ,  Chung-Shi Liu ,  Hsin-Hung Liao ,  Chien-Ling Hwang

IPC: H01L23/00 ,  C25D1/22 ,  C25D1/00

Abstract: A method of manufacturing micro pins includes forming a release layer over a substrate. A pattern layer is formed over the release layer, in which the pattern layer has a plurality of openings spaced apart to each other and through the pattern layer. A plurality of micro pins are respectively formed in the openings. The pattern layer and the release layer are removed to obtain the micro pins. An isolated conductive micro pin for connecting one or more components is also provided.

公开(公告)号：US20180025966A1

公开(公告)日：2018-01-25

申请号：US15215598

申请日：2016-07-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chien-Ling Hwang ,  Ching-Hua Hsieh ,  Hsin-Hung Liao ,  Ying-Jui Huang

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H01L21/683

CPC classification number: H01L23/49805 ,  H01L21/4846 ,  H01L21/486 ,  H01L21/6835 ,  H01L23/49827 ,  H01L24/02 ,  H01L24/13 ,  H01L24/16 ,  H01L24/73 ,  H01L2021/60022 ,  H01L2221/68359 ,  H01L2224/02379 ,  H01L2224/024 ,  H01L2224/1301 ,  H01L2224/16235 ,  H01L2224/73253

Abstract: Provided is an integrated fan-out package including a die, a first redistribution circuit structure, a second redistribution circuit structure, a plurality of solder joints, a plurality of conductive posts, and an insulating encapsulation. The first redistribution circuit structure and the second redistribution circuit structure are formed respectively over a back surface and an active surface of the die to sandwich the die. The solder joints are formed aside the die and connected to the first redistribution circuit structure. The conductive posts are formed on the solder joints and connected to the second redistribution circuit structure, and connected to the first redistribution circuit structure through the solder joints. A plurality of sidewalls of the die, a plurality of sidewalls of the conductive posts, and a plurality of sidewalls of the solder joints are encapsulated by the insulating encapsulation. A fabricating process of the integrated fan-out package is also provided.