公开(公告)号：US08595891B2

公开(公告)日：2013-12-03

申请号：US13106198

申请日：2011-05-12

申请人： Yoshihiro Okamoto ,  Mitsuhiro Takeda ,  Takashi Kawamoto

发明人： Yoshihiro Okamoto ,  Mitsuhiro Takeda ,  Takashi Kawamoto

IPC分类号： A47L5/38

CPC分类号： B08B7/0028 ,  B08B1/007 ,  B08B3/12 ,  B23K1/0016 ,  B23K1/018 ,  B23K3/0607 ,  B23K3/08 ,  B23K2101/42 ,  H05K3/3478

摘要： A adhered substance removing device of the present disclosure includes a suction removal unit configured to suck and remove a liquid medium with which a wiping sheet is impregnated and adhered substances which is separated from the wiping sheet by an oscillation unit and re-adhered to a surface of the wiping sheet. The suction removal unit includes a cylindrical suction nozzle having inlet holes in a surface along which the wiping sheet is guided. and a suction pump configured to suck air from the suction nozzle. The Suction pump is connected to the suction nozzle, and a lid is detachably attached to an opening of the suction nozzle.

摘要翻译： 本公开的附着物除去装置具有：抽吸除去部，其被吸引除去通过振动部从所述擦拭片分离并附着于所述表面上的与所述擦拭片浸渍的液体介质， 的擦拭片。 抽吸去除单元包括圆筒形吸嘴，该吸嘴在擦拭片被引导的表面中具有入口孔。 以及构造成从吸嘴吸入空气的抽吸泵。 抽吸泵连接到吸嘴，并且盖子可拆卸地附接到吸嘴的开口。

公开(公告)号：US20120252377A1

公开(公告)日：2012-10-04

申请号：US13409451

申请日：2012-03-01

申请人： Yusuke Wachi ,  Takashi Kawamoto ,  Yuta Sugiyama

发明人： Yusuke Wachi ,  Takashi Kawamoto ,  Yuta Sugiyama

IPC分类号： H04B1/44

CPC分类号： H03K17/002 ,  H03K17/693 ,  H04B1/44

摘要： In a high frequency antenna switch module, an I/O interface generates various control signals for controlling a switch module on the basis of a system data signal and a system clock, a decoder generates a switch control signal SWCNT for controlling a switch in response to a control signal CNT in the control signals, a timing detector for switch-ports switching generates a switch-port switching detection signal t_sw in response to the switch control signal, a frequency control signal generator generates frequency control signals ICONT and CCONT in response to the signal t_sw, and a negative voltage generation circuit generates a negative voltage output signal NVG_OUT while switching the frequency of the clock signal generated in the negative voltage generation circuit to different frequencies in response to signals ICONT and CCONT. The switch switches the paths among the plural switch ports in response to the signals SWCNT and NVG_OUT.

摘要翻译： 在高频天线切换模块中，I / O接口产生用于根据系统数据信号和系统时钟控制开关模块的各种控制信号，解码器产生用于响应于控制开关控制开关的开关控制信号SWCNT 控制信号中的控制信号CNT，用于开关端口切换的定时检测器响应于开关控制信号产生开关端口切换检测信号t_sw，频率控制信号发生器响应于该控制信号产生频率控制信号ICONT和CCONT 信号t_sw，并且负电压产生电路响应于信号ICONT和CCONT将负电压产生电路中产生的时钟信号的频率切换到不同的频率，产生负电压输出信号NVG_OUT。 响应于信号SWCNT和NVG_OUT，开关切换多个开关端口中的路径。

公开(公告)号：US08134392B2

公开(公告)日：2012-03-13

申请号：US12622604

申请日：2009-11-20

申请人： Takashi Kawamoto

发明人： Takashi Kawamoto

IPC分类号： H03L7/06

CPC分类号： H03L7/0995 ,  H03L7/0893 ,  H03L7/10 ,  H03L7/18

摘要： A phase locked loop (PLL) which has a desired frequency characteristic even though a manufacturing process of a semiconductor integrated circuit has fluctuations. The semiconductor integrated circuit includes the PLL and a control unit. The PLL has a phase frequency detector, a loop filter, a voltage controlled oscillator (VCO) and a divider. The VCO comprises a voltage-current converter (VIC) and a ring oscillator. In response to a control voltage, the VIC generates a control current for setting each operating current of the ring oscillator. The control unit switches the PLL to a calibration operating period of its open loop and a normal operating period of its closed loop.

公开(公告)号：US08030995B2

公开(公告)日：2011-10-04

申请号：US12644833

申请日：2009-12-22

申请人： Yoichi Okubo ,  Manabu Nakamura ,  Junya Dosaka ,  Yasuhiro Takeda ,  Taizo Ito ,  Naoki Hongo ,  Taizo Yamawaki ,  Takashi Kawamoto ,  Akira Maeki

发明人： Yoichi Okubo ,  Manabu Nakamura ,  Junya Dosaka ,  Yasuhiro Takeda ,  Taizo Ito ,  Naoki Hongo ,  Taizo Yamawaki ,  Takashi Kawamoto ,  Akira Maeki

IPC分类号： H03G3/00

CPC分类号： H03F1/0227 ,  H03F3/19 ,  H03F2200/451 ,  H03F2200/462

摘要： A power circuit used for an amplifier, which includes an amplifier provided with a linear amplifier serving as a voltage source, a DC/DC converter serving as a current source, a hysteresis comparator controlling the DC/DC converter, and a current detector detecting output current from the linear amplifier to output the detected output current to the hysteresis comparator; and a switching restricting device for restricting a switching interval in the DC/DC converter such that the switching interval is not equal to or less than a constant time or is not shorter than the constant time.

摘要翻译： 用于放大器的电源电路，其包括放大器，该放大器设置有用作电压源的线性放大器，用作电流源的DC / DC转换器，控制DC / DC转换器的滞环比较器以及电流检测器检测输出 电流从线性放大器输出检测输出电流到滞后比较器; 以及用于限制DC / DC转换器中的切换间隔使得切换间隔不等于或小于恒定时间或不短于恒定时间的切换限制装置。

公开(公告)号：US20070153129A1

公开(公告)日：2007-07-05

申请号：US11548991

申请日：2006-10-12

申请人： Takashi Kawamoto ,  Tomoaki Takahashi ,  Shinya Kikuchi ,  Yoshimi Ishida ,  Hiromitsu Nishio

发明人： Takashi Kawamoto ,  Tomoaki Takahashi ,  Shinya Kikuchi ,  Yoshimi Ishida ,  Hiromitsu Nishio

IPC分类号： H04N5/268

CPC分类号： G06F1/12 ,  H03L7/18 ,  H04L7/10

摘要： Disclosed is a semiconductor IC device using a low-price oscillator, which is capable of bidirectional communication with a host and features a low price. In bidirectional communication between a host and a device, the device comprises a synchronization establishment unit, a frequency difference detector, a frequency generator, and an oscillator providing a reference signal. The synchronization establishment unit to which an output signal from the host is inputted outputs a received signal, a synchronization establishment signal and a reception data. The frequency difference detector detects a frequency difference between a received signal and a transmitting signal, and outputs a frequency coordination signal to the frequency generator. The number of frequency division of the frequency generator is controlled by the frequency coordination signal, and the frequency generator is capable of matching the frequency of the transmitting signal which is an output signal with the frequency of the received signal.

摘要翻译： 公开了一种使用低价振荡器的半导体IC器件，其能够与主机进行双向通信并且具有低价格。 在主机和设备之间的双向通信中，设备包括同步建立单元，频差检测器，频率发生器和提供参考信号的振荡器。 输入来自主机的输出信号的同步建立单元输出接收信号，同步建立信号和接收数据。 频率差检测器检测接收信号和发送信号之间的频率差，并将频率协调信号输出到频率发生器。 频率发生器的分频数由频率协调信号控制，频率发生器能够将作为输出信号的发送信号的频率与接收信号的频率进行匹配。

公开(公告)号：US08961243B2

公开(公告)日：2015-02-24

申请号：US13544305

申请日：2012-07-09

申请人： Yoshiaki Asakuma ,  Takashi Kawamoto ,  Toshiyuki Takii

发明人： Yoshiaki Asakuma ,  Takashi Kawamoto ,  Toshiyuki Takii

IPC分类号： H01R13/502 ,  H01R13/58 ,  H01R24/30

CPC分类号： H01R13/5833 ,  H01R24/30

摘要： An attachment plug includes: a plurality of plug pins; a plurality of screw terminal blocks electrically connected to the corresponding plug pins, respectively; a body block accommodated within a shell for holding the screw terminal blocks; and an electric wire positioning member for holding the electric cords included in a multi-core cable introduced into the shell from outside in the state where the electric cords are positioned to correspond to the respective screw terminal blocks. The electric wire positioning member includes a plurality of hooking pieces for holding the electric cords exposed outside by stripping a sheath of the multi-core cable in the state where the electric cord are positioned to correspond to the respective screw terminal blocks.

摘要翻译： 附件插头包括：多个插头销; 分别电连接到相应的插头销的多个螺钉端子块; 容纳在壳体内的用于保持螺钉端子块的主体块; 以及电线定位构件，用于在电线被定位成对应于各个螺钉端子块的状态下将包括在从外部引入壳体的多芯电缆中包括的电线保持。 电线定位构件包括多个挂钩片，用于在电线被定位成对应于各个螺钉端子块的状态下，通过剥离多芯电缆的护套来将外露的电线保持在外部。

公开(公告)号：US08882547B2

公开(公告)日：2014-11-11

申请号：US13543048

申请日：2012-07-06

申请人： Yoshiaki Asakuma ,  Takashi Kawamoto ,  Toshiyuki Takii

发明人： Yoshiaki Asakuma ,  Takashi Kawamoto ,  Toshiyuki Takii

IPC分类号： H01R4/36 ,  H01R4/42

CPC分类号： H01R4/42

摘要： A screw terminal block 10A includes a terminal plate 12 provided with an insertion hole 12a through which a terminal screw 11 is inserted; and a fastening plate 13 provided with a screw hole 13a to which the terminal screw 11 inserted through the insertion hole 12a is screwed. The screw hole 13a is formed in the fastening plate 13, and a protrusion 13b is provided at right and left sides of the fastening plate 13. Upper and lower locking pieces 12b protruding toward the fastening plate 13 are provided at right and left side ends of the terminal plate 12 to sandwich the protrusion 13b therebetween. The locking piece 12b of the terminal plate 12 and the protrusion 13b of the fastening plate 13 are engaged with each other to restrict the relative rotation of the fastening plate 13 and the terminal plate 12.

摘要翻译： 螺钉端子块10A包括端子板12，端子板12设置有插入孔12a，端子螺钉11通过插入孔12a插入; 以及设置有螺钉孔13a的紧固板13，通过插入孔12a插入的端子螺钉11被螺纹连接。 螺钉孔13a形成在紧固板13中，突起13b设置在紧固板13的左右侧。向固定板13突出的上下锁定片12b设置在紧固板13的右侧和左侧 端子板12将突起13b夹在其间。 端子板12的锁定片12b和紧固板13的突起13b彼此接合以限制紧固板13和端子板12的相对旋转。

公开(公告)号：US08289057B2

公开(公告)日：2012-10-16

申请号：US13351745

申请日：2012-01-17

申请人： Takashi Kawamoto

发明人： Takashi Kawamoto

IPC分类号： H03L7/06

CPC分类号： H03L7/0995 ,  H03L7/0893 ,  H03L7/10 ,  H03L7/18

摘要： A phase locked loop (PLL) which has a desired frequency characteristic even though a manufacturing process of a semiconductor integrated circuit has fluctuations. The semiconductor integrated circuit includes the PLL and a control unit. The PLL has a phase frequency detector, a loop filter, a voltage controlled oscillator (VCO) and a divider. The VCO comprises a voltage-current converter (VIC) and a ring oscillator. In response to a control voltage, the VIC generates a control current for setting each operating current of the ring oscillator. The control unit switches the PLL to a calibration operating period of its open loop and a normal operating period of its closed loop.

摘要翻译： 即使半导体集成电路的制造过程具有波动，也具有期望的频率特性的锁相环（PLL）。 半导体集成电路包括PLL和控制单元。 PLL具有相位检波器，环路滤波器，压控振荡器（VCO）和分频器。 VCO包括电压 - 电流转换器（VIC）和环形振荡器。 响应于控制电压，VIC产生用于设置环形振荡器的每个工作电流的控制电流。 控制单元将PLL切换到其开环的校准工作周期及其闭环的正常工作周期。

公开(公告)号：US20120237295A1

公开(公告)日：2012-09-20

申请号：US13413931

申请日：2012-03-07

申请人： Takashi Kawamoto ,  Takafumi Matsuda ,  Masaaki Miyamoto ,  Hironori Sadakane ,  Katsunori Yokokawa ,  Minoru Tsukahara ,  Junichi Kawaura ,  Yuki Motoyama

发明人： Takashi Kawamoto ,  Takafumi Matsuda ,  Masaaki Miyamoto ,  Hironori Sadakane ,  Katsunori Yokokawa ,  Minoru Tsukahara ,  Junichi Kawaura ,  Yuki Motoyama

IPC分类号： E01C11/02

CPC分类号： E01D19/06

摘要： A jointing structure comprising multiple steps provided face to face at the coaxially built traveling path ends with an expansion gap between, multiple elastic members respectively mounted inside the multiple steps, and a joint block mounted on the multiple elastic members across the expansion gap. Multiple supporting blocks and one or more than one intermediate joint block are mounted inside the multiple steps with the joint block between. The multiple supporting blocks, the joint block and the one or more than one intermediate joint block are of concrete. The elastic members are joined together across the expansion gap. The elastic member on one side is fixed to the inside of the step on one side and then subjected to deformation toward the bridge girder axis, and thereafter, the elastic member on the other side is fixed to the inside of the step on the other side.

摘要翻译： 包括在同轴构造的行进路径上面对面设置的多个台阶的接合结构，分别安装在多个台阶内的多个弹性构件之间的膨胀间隙，以及安装在多个弹性构件上的膨胀间隙的接头块。 多个支撑块和一个或多于一个中间接合块安装在多个台阶内，其间具有接合块。 多个支撑块，接头块和一个或多个中间接头块是具体的。 弹性构件通过膨胀间隙连接在一起。 一侧的弹性部件固定在一侧的台阶的内侧，然后朝向桥梁轴线变形，此后，另一侧的弹性部件固定在台阶的另一侧的内侧 。

公开(公告)号：US07859345B2

公开(公告)日：2010-12-28

申请号：US12337459

申请日：2008-12-17

申请人： Takashi Kawamoto

发明人： Takashi Kawamoto

IPC分类号： H03L7/093

CPC分类号： H03L7/0898 ,  H03L7/0893 ,  H03L7/093 ,  H03L7/1976

摘要： The semiconductor integrated circuit incorporates a PLL circuit including a phase-frequency comparator 1, first and second charge pumps 2 and 3, a loop filter 4, a voltage-control oscillator 5 and a divider 6. The operation mode of the PLL circuit includes a standby state where locking is stopped, a lock response operation where locking is started and a steady lock operation where the locking started by the lock response operation is continued. In the steady lock operation, setting is made so that the second charge pump 3 is smaller in charge/discharge current than the first charge pump 2. The first and second charge pumps 2 and 3 charge and discharge the loop filter 4 in response to outputs of the phase-frequency comparator 1 in reverse to each other in phase. In the lock response operation where locking is started, the second charge pump 3 is stopped from charging and discharging in reverse in phase.

摘要翻译： 半导体集成电路包括PLL电路，其包括相位频率比较器1，第一和第二电荷泵2和3，环路滤波器4，电压控制振荡器5和分频器6. PLL电路的操作模式包括 停止锁定的待机状态，开始锁定的锁定响应操作以及继续通过锁定响应操作开始的锁定的稳定的锁定操作。 在稳定锁定操作中，进行设定使得第二电荷泵3的充电/放电电流比第一充电泵2小。第一和第二充电泵2和3响应于输出而对环路滤波器4进行充电和放电 相位相反的相位频率比较器1。 在锁定开始的锁定响应操作中，第二电荷泵3相位反向停止充电和放电。