MEASURING ELECTRODE IMPEDANCE IN AN IMPEDANCE MEASUREMENT CIRCUIT
    11.
    发明申请
    MEASURING ELECTRODE IMPEDANCE IN AN IMPEDANCE MEASUREMENT CIRCUIT 审中-公开
    测量电阻测量电路中的电极阻抗

    公开(公告)号:US20150293045A1

    公开(公告)日:2015-10-15

    申请号:US14683338

    申请日:2015-04-10

    Abstract: The disclosure provides a circuit for impedance measurement. The circuit includes an excitation source coupled between a first set of input switches. An impedance network is coupled between the first set of input switches and a first set of output switches. The impedance network includes a body impedance and a plurality of electrode impedances. A sense circuit is coupled to the first set of output switches. The sense circuit measures the body impedance and at least one electrode impedance of the plurality of electrode impedances.

    Abstract translation: 本公开提供了用于阻抗测量的电路。 电路包括耦合在第一组输入开关之间的激励源。 阻抗网络耦合在第一组输入开关和第一组输出开关之间。 阻抗网络包括身体阻抗和多个电极阻抗。 感测电路耦合到第一组输出开关。 感测电路测量身体阻抗和多个电极阻抗中的至少一个电极阻抗。

    IMPEDANCE MEASUREMENT CIRCUIT
    15.
    发明申请
    IMPEDANCE MEASUREMENT CIRCUIT 有权
    阻抗测量电路

    公开(公告)号:US20150305648A1

    公开(公告)日:2015-10-29

    申请号:US14694500

    申请日:2015-04-23

    CPC classification number: G01R27/08 A61B5/053

    Abstract: The disclosure provides a circuit for impedance measurement. The circuit includes an excitation source that generates an excitation signal. A switched resistor network is coupled to the excitation source, and generates an output signal in response to the excitation signal. A sense circuit is coupled to the switched resistor network, and generates a sense signal in response to the output signal. A comparator is coupled to the sense circuit, and generates a clock signal in response to the sense signal. A mixer is coupled to the sense circuit, and multiplies the sense signal and the clock signal to generate a rectified signal. A low pass filter is coupled to the mixer and filters the rectified signal to generate an averaged signal. A processor is coupled to the low pass filter and measures a body impedance from the averaged signal.

    Abstract translation: 本公开提供了一种用于阻抗测量的电路。 该电路包括产生激励信号的激励源。 开关电阻网络耦合到激励源,并且响应于激励信号产生输出信号。 感测电路耦合到开关电阻网络,并且响应于输出信号产生感测信号。 比较器耦合到感测电路,并响应于感测信号产生时钟信号。 混频器耦合到感测电路,并且将感测信号和时钟信号相乘以产生整流信号。 低通滤波器耦合到混频器并对整流信号进行滤波以产生平均信号。 处理器耦合到低通滤波器并根据平均信号测量身体阻抗。

    DC Offset Correction with Low Frequency Signal Support Circuits and Methods
    16.
    发明申请
    DC Offset Correction with Low Frequency Signal Support Circuits and Methods 有权
    直流偏移校正与低频信号支持电路和方法

    公开(公告)号:US20150054560A1

    公开(公告)日:2015-02-26

    申请号:US14468009

    申请日:2014-08-25

    CPC classification number: H03K5/003

    Abstract: DC offset correction is provided with low frequency support. A first input terminal for receiving an input signal is selectively coupled to a resistance and a capacitor that are series coupled between the first input terminal and a corresponding output terminal. In a calibration phase, the series resistance is coupled between the input terminal and the capacitor and an average voltage level of the input is stored on capacitor. In a signal processing phase, the charged capacitor is coupled in series between the input terminal and the output terminal while the resistance is bypassed. The output signal obtained contains the high and low frequency components of the input signal, while the DC offset in the input signal is removed from the output signal. A differential circuit and methods are disclosed. Additional embodiments are disclosed.

    Abstract translation: DC偏移校正提供低频支持。 用于接收输入信号的第一输入端选择性地耦合到串联耦合在第一输入端和相应输出端之间的电阻和电容。 在校准阶段,串联电阻耦合在输入端和电容之间,输入的平均电压电平存储在电容上。 在信号处理阶段,当电阻被旁路时,充电的电容器串联在输入端子和输出端子之间。 获得的输出信号包含输入信号的高频和低频分量,输入信号中的直流偏移从输出信号中去除。 公开了一种差分电路和方法。 公开了另外的实施例。

Patent Agency Ranking