公开(公告)号：US07330099B2

公开(公告)日：2008-02-12

申请号：US10521908

申请日：2003-07-22

Applicant: Torayuki Tsukada

Inventor： Torayuki Tsukada

IPC: H01C1/012

CPC classification number: H01C7/003 ,  H01C1/144 ,  H01C17/006 ,  H01C17/281 ,  H05K3/3442 ,  Y10T29/49099

Abstract: A chip resistor includes a resistive element (1), an insulation layer (4) formed in a back surface of the flat surface, and two electrodes (3) spaced from each other via the insulation layer. Each electrode (3) makes contact with the insulation layer (4). Each electrode (3) has a lower surface formed with a solder layer (39).

公开(公告)号：US07326999B2

公开(公告)日：2008-02-05

申请号：US10553044

申请日：2004-04-16

Applicant: Torayuki Tsukada

Inventor： Torayuki Tsukada

IPC: H01L23/62 ,  H01C1/03 ,  H01C1/028

CPC classification number: H01C1/14 ,  H01C7/003 ,  H01C17/006

Abstract: A chip resistor (R1) includes a resistor element (1) having a first surface (1a) and a second surface (1b) opposite to the first surface. Two main electrodes (21), spaced from each other, are provided on the first surface (1a), while two auxiliary electrodes (22), spaced from each other, are provided on the second surface (1b). The auxiliary electrodes face the main electrodes (21) via the resistor element (1). The main electrodes (21) and the auxiliary electrodes (22) are made of the same material.

Abstract translation: 芯片电阻器（R 1）包括具有第一表面（1a）和与第一表面相对的第二表面（1b）的电阻元件（1）。 在第一表面（1a）上设置彼此间隔开的两个主电极（21），而在第二表面（1b）上设置彼此间隔开的两个辅助电极（22）。 辅助电极通过电阻元件（1）面对主电极（21）。 主电极（21）和辅助电极（22）由相同的材料制成。

公开(公告)号：US20060205171A1

公开(公告)日：2006-09-14

申请号：US10553044

申请日：2004-04-16

Applicant: Torayuki Tsukada

Inventor： Torayuki Tsukada

IPC: H01L29/76 ,  H01L21/20 ,  H01L29/94 ,  H01L31/00

CPC classification number: H01C1/14 ,  H01C7/003 ,  H01C17/006

Abstract: A chip resistor (R1) includes a resistor element (1) having a first surface (1a) and a second surface (1b) opposite to the first surface. Two main electrodes (21), spaced from each other, are provided on the first surface (1a), while two auxiliary electrodes (22), spaced from each other, are provided on the second surface (1b). The auxiliary electrodes face the main electrodes (21) via the resistor element (1). The main electrodes (21) and the auxiliary electrodes (22) are made of the same material.

Abstract translation: 芯片电阻器（R 1）包括具有第一表面（1a）和与第一表面相对的第二表面（1b）的电阻元件（1）。 在第一表面（1a）上设置彼此间隔开的两个主电极（21），而在第二表面（1b）上设置彼此间隔开的两个辅助电极（22）。 辅助电极通过电阻元件（1）面对主电极（21）。 主电极（21）和辅助电极（22）由相同的材料制成。

公开(公告)号：US06856233B2

公开(公告)日：2005-02-15

申请号：US10093374

申请日：2002-03-11

Applicant: Torayuki Tsukada ,  Mitsuo Nonaka

Inventor： Torayuki Tsukada ,  Mitsuo Nonaka

IPC: H01C7/00 ,  H01C17/24 ,  H01C1/00

CPC classification number: H01C7/003 ,  H01C17/24

Abstract: A chip resistor having a highly accurately adjusted low resistance value is obtained. The chip resistor having a vertically three-layered structure is obtained by forming a first electrode 1A by printing paste for an electrode on an insulating substrate 5 and drying it, a resistor layer 3 by printing paste for a resistor on the first electrode 1A and drying it, a second electrode 1B by printing paste for an electrode on the resistor layer 3 and the insulating substrate 5 and baking it. Trimming is applied to the thus fabricated chip resistor so as to adjust a resistance value to a given value.

Abstract translation: 获得具有高精度调节的低电阻值的片式电阻器。 具有垂直三层结构的芯片电阻器通过在绝缘基板5上印刷电极用糊料并干燥来形成第一电极1A，通过在第一电极1A上印刷电阻器的浆料并干燥来获得电阻层3 第二电极1B，通过在电阻层3和绝缘基板5上印刷电极浆料并进行烘烤。 对这样制造的芯片电阻器进行修整，以将电阻值调整到给定值。

公开(公告)号：US06724295B2

公开(公告)日：2004-04-20

申请号：US10092257

申请日：2002-03-07

Applicant: Torayuki Tsukada

Inventor： Torayuki Tsukada

IPC: H01C1012

CPC classification number: H01C17/006 ,  H01C1/148 ,  H01C7/003 ,  H01C17/281

Abstract: A method of making a chip resistor is provided. According to this method, an aggregate board is first prepared which includes a first region and a second region which are spaced from each other via an excess portion. Then, a conductor pattern is formed which extends to bridge the first region and the second region. Subsequently, a resistor element is formed in each of the first region and the second region for connection to the conductor pattern. Then, the aggregate board is cut at the excess portion. The conductor pattern includes a thinner-walled portion extending across the excess portion and a thicker-walled portion connected to the thinner-walled portion and spaced from the excess portion.

Abstract translation: 提供制造片式电阻器的方法。 根据该方法，首先制备包括通过多余部分彼此间隔开的第一区域和第二区域的聚集板。 然后，形成延伸以桥接第一区域和第二区域的导体图案。 随后，在第一区域和第二区域中的每一个中形成电阻元件，以连接到导体图案。 然后，在多余部分切割聚集板。 导体图案包括延伸穿过多余部分的较薄壁部分和连接到较薄壁部分并与多余部分间隔开的较厚壁部分。

公开(公告)号：US07755467B2

公开(公告)日：2010-07-13

申请号：US11990405

申请日：2006-08-02

Applicant: Torayuki Tsukada

Inventor： Torayuki Tsukada

IPC: H01C10/00

CPC classification number: H01C7/003 ,  H01C1/084 ,  H01C1/148 ,  H05K3/3442

Abstract: The chip resistor (1) of the present invention includes a pair of terminal electrodes (4, 5) provided at ends of an insulating substrate (2) in the form of a chip, and a resistor film (3) formed on the upper surface of the insulating substrate (2) for electrical connection to the paired terminal electrodes (4, 5) and formed with a trimming groove (3a) for setting the resistance. The paired terminal electrodes (4, 5) include a lower electrode (4b) formed on the lower surface of the insulating substrate (2). The lower electrode (4b) extends up to a position directly below a narrower portion (8) of the resistor film (3) which has a relatively small width due to the formation of the trimming groove (3a) in the resistor film (3).

Abstract translation: 本发明的芯片电阻器（1）包括设置在芯片形式的绝缘基板（2）的端部的一对端子电极（4,5）和形成在上表面上的电阻膜（3） 和与成对的端子电极（4,5）电连接并形成有用于设定电阻的修整槽（3a）的绝缘基板（2）。 成对的端子电极（4,5）包括在绝缘基板（2）的下表面上形成的下电极（4b）。 下电极（4b）由于在电阻膜（3）中形成修整槽（3a）而延伸到电阻膜（3）的较窄部分（8）的正下方的位置，该电阻膜具有相对较小的宽度， 。

公开(公告)号：US07327214B2

公开(公告)日：2008-02-05

申请号：US11526975

申请日：2006-09-26

Applicant: Torayuki Tsukada

Inventor： Torayuki Tsukada

IPC: H01C1/012 ,  H01C17/00

CPC classification number: H01C17/281 ,  H01C1/148 ,  H01C17/006 ,  Y10T29/49082

Abstract: A chip resistor includes a metal resistor element having a flat lower surface. The lower surface is formed with two electrodes spaced from each other, and an insulating resin film is formed between these electrodes. Each of the electrodes partially overlaps the insulating film so that a portion of the insulating film is inserted between each of the electrodes and the lower surface of the resistor element.

Abstract translation: 芯片电阻器包括具有平坦的下表面的金属电阻器元件。 下表面形成有彼此间隔开的两个电极，并且在这些电极之间形成绝缘树脂膜。 每个电极部分地与绝缘膜重叠，使得绝缘膜的一部分插入每个电极和电阻元件的下表面之间。

公开(公告)号：US20070132545A1

公开(公告)日：2007-06-14

申请号：US11703979

申请日：2007-02-08

Applicant: Torayuki Tsukada

Inventor： Torayuki Tsukada

IPC: H01C1/012

CPC classification number: H01C1/144 ,  H01C7/003 ,  H01C17/006 ,  H05K3/3442

Abstract: A chip resistor includes a resistor element in the form of a chip, and at least two electrodes formed on the resistor element. The resistor element includes an upper surface, a lower surface, and two end surfaces extending between the upper and the lower surfaces and spaced from each other. The two electrodes are provided on the lower surface of the resistor element. Each of the end surfaces of the resistor element is formed with a conductor film integrally connected to a corresponding one of the electrodes. The conductor film is made of copper, for example, and is higher in solder-wettability than the resistor element.

公开(公告)号：US20060273423A1

公开(公告)日：2006-12-07

申请号：US10552301

申请日：2004-04-07

Applicant: Torayuki Tsukada

Inventor： Torayuki Tsukada

IPC: H01L29/00

CPC classification number: H01C7/003 ,  H01C17/006

Abstract: A chip resistor (A1) includes a resistor element (1) including an electrode forming surface (10b), two electrodes (3) provided at the electrode-forming surface (10b), and an insulating layer (2A) provided at the electrode-forming surface (10b). The electrode-forming surface (10b) includes an inter-electrode region positioned between the two electrodes (3) and covered by the insulating layer (2A). The insulating layer (2A) has a thickness (t2) which is equal or generally equal to the thickness (t1) of the electrodes (3).

Abstract translation: 芯片电阻器（A 1）包括：电极形成表面（10b），设置在电极形成表面（10b）处的两个电极（3））和设置在电极形成表面（10b）上的绝缘层（2A）的电阻元件（1） 在电极形成表面（10b）处。 电极形成表面（10b）包括位于两个电极（3）之间并由绝缘层（2A）覆盖的电极间区域。 绝缘层（2A）的厚度（t 2）等于或大致等于电极（3）的厚度（t 1）。

公开(公告)号：US20050035844A1

公开(公告)日：2005-02-17

申请号：US10833939

申请日：2004-04-27

Applicant: Torayuki Tsukada

Inventor： Torayuki Tsukada

IPC: H01C3/00 ,  H01C1/148 ,  H01C17/00 ,  H01C17/02 ,  H01C17/06 ,  H01C17/28 ,  H01C1/012

CPC classification number: H01C17/281 ,  H01C1/148 ,  H01C17/006 ,  Y10T29/49082

Abstract: A chip resistor includes a metal resistor element having a flat lower surface. The lower surface is formed with two electrodes spaced from each other, and an insulating resin film is formed between these electrodes. Each of the electrodes partially overlaps the insulating film so that a portion of the insulating film is inserted between each of the electrodes and the lower surface of the resistor element.

Abstract translation: 芯片电阻器包括具有平坦的下表面的金属电阻器元件。 下表面形成有彼此间隔开的两个电极，并且在这些电极之间形成绝缘树脂膜。 每个电极部分地与绝缘膜重叠，使得绝缘膜的一部分插入每个电极和电阻元件的下表面之间。