公开(公告)号：US20230380154A1

公开(公告)日：2023-11-23

申请号：US18365243

申请日：2023-08-04

Applicant: United Microelectronics Corp.

Inventor： Liang Yi ,  Zhiguo Li ,  Chi Ren ,  Qiuji Zhao ,  Boon Keat Toh

IPC: H10B41/30 ,  H01L29/788 ,  H01L29/51 ,  H01L29/423

CPC classification number: H10B41/30 ,  H01L29/788 ,  H01L29/518 ,  H01L29/513 ,  H01L29/42328

Abstract: A structure of memory device includes an active region in a substrate, a dielectric layer on the active region, and a floating gate disposed on the dielectric layer. The active region extends along a first direction in a top-view. The floating gate includes a first protruding structure extending along the first direction from a sidewall of the floating gate protruding from a top surface of the substrate. The whole of the first protruding structure is located in the active region.

公开(公告)号：US20230045722A1

公开(公告)日：2023-02-09

申请号：US17468637

申请日：2021-09-07

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Liang Yi ,  Zhiguo Li ,  Chi Ren ,  Xiaojuan Gao ,  Boon Keat Toh

IPC: H01L27/11531 ,  H01L27/11573 ,  H01L29/423 ,  H01L29/78 ,  H01L29/788 ,  H01L29/792 ,  H01L21/28 ,  H01L29/66

Abstract: A semiconductor memory device includes a semiconductor substrate, a select gate on the semiconductor substrate, a control gate disposed adjacent to the select gate and having a first sidewall and a second sidewall, and a charge storage layer between the control gate and the semiconductor substrate. The control gate includes a third sidewall close to the second sidewall of the select gate, a fourth sidewall opposite to the third sidewall, and a non-planar top surface between the third sidewall and the fourth sidewall. The non-planar top surface includes a first surface region that descends from the third sidewall to the fourth sidewall. The charge storage layer extends to the second sidewall of the select gate.