公开(公告)号：US11227949B2

公开(公告)日：2022-01-18

申请号：US16877516

申请日：2020-05-19

Applicant: University of Electronic Science and Technology of China

Inventor： Ming Qiao ,  Longfei Liang ,  Yilei Lyu ,  Zhao Qi ,  Bo Zhang

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/04

Abstract: A low specific on-resistance (Ron,sp) power semiconductor device includes a power device and a transient voltage suppressor (TVS); wherein the power device comprises a gate electrode, a drain electrode, a bulk electrode, a source electrode and a parasitic body diode, the bulk electrode and the source electrode are shorted, the TVS comprises an anode electrode and a cathode electrode, the drain electrode of the power device and the anode electrode of the TVS are connected by a first metal to form a high-voltage terminal electrode, the source electrode of the power device and the cathode electrode of the TVS are connected by a second metal to form a low-voltage terminal electrode.

公开(公告)号：US10607987B2

公开(公告)日：2020-03-31

申请号：US16255851

申请日：2019-01-24

Applicant: University of Electronic Science and Technology of China

Inventor： Ming Qiao ,  Song Pu ,  Bo Zhang

IPC: H01L27/06 ,  H01L21/8258 ,  H01L21/784

Abstract: A BIPOLAR-CMOS-DMOS (BCD) semiconductor device and manufacturing method, which can integrate a Junction Field-Effect Transistor (JFET), two classes of Vertical Double-diffusion Metal Oxide Semiconductor (VDMOS), a Lateral Insulated-Gate Bipolar Transistor (LIGBT) and seven kinds of Laterally Diffused Metal Oxide Semiconductor (LDMOS), a low-voltage Negative channel Metal Oxide Semiconductor (NMOS), a low-voltage Positive channel Metal Oxide Semiconductor (PMOS), a low-voltage Negative-Positive-Negative (NPN) transistor and a low-voltage Positive-Negative-Positive (PNP) transistor, and a diode in the same chip. Bipolar devices in the analog circuit, power components in the switch circuit, Complementary Metal Oxide Semiconductor (CMOS) devices in the logic circuit and other kinds of lateral and vertical components are integrated. This present invention saves costs at the same time greatly improve chip integration. The manufacturing method of the present invention is simple, and the difficulty of process is relatively less.

公开(公告)号：US10068965B1

公开(公告)日：2018-09-04

申请号：US15718001

申请日：2017-09-28

Applicant: University of Electronic Science and Technology of China

Inventor： Ming Qiao ,  Yang Yu ,  Wentong Zhang ,  Zhengkang Wang ,  Zhenya Zhan ,  Bo Zhang

IPC: H01L29/06 ,  H01L29/78 ,  H01L27/02 ,  H01L29/40 ,  H01L29/739 ,  H01L29/735

Abstract: The present invention relates to a lateral high-voltage device. The device includes a dielectric trench region. A doping-overlapping structure with different doping types alternating mode is provided at least below, on a left side of, or on a right side of the dielectric trench region. The device also includes a dielectric layer, a body field plate, a polysilicon gate, a gate oxide layer, a first N-type heavy doping region, a second N-type heavy doping region, a P-type heavy doping region, a P-well region, the first N-type doping pillar, the second N-type doping pillar, the third N-type doping pillar, the first P-type doping pillar, and the second P-type doping pillar. The invention adopts a dielectric trench region in the drift region to keep the breakdown voltage BV of the device while reducing the surface area of the device, and effectively reducing the device's specific On-Resistance RON,sp.