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公开(公告)号:US20190243966A1
公开(公告)日:2019-08-08
申请号:US16004191
申请日:2018-06-08
Applicant: VMware, Inc.
Inventor: Michael Wei , Dan Tsafrir , Nadav Amit
IPC: G06F21/54 , G06F12/1009
Abstract: In accordance with embodiments of the present disclosure, a binary translator can perform address shifting on the binary code of an executing application. Address shifting serves to shift the addresses of memory operations that can access locations in the kernel address space into address locations in the user space, thus avoiding speculative access into the kernel address space.
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公开(公告)号:US20220398199A1
公开(公告)日:2022-12-15
申请号:US17348529
申请日:2021-06-15
Applicant: VMware, Inc.
Inventor: Irina Calciu , Muhammad Talha Imran , Nadav Amit
IPC: G06F12/0882 , G06F12/1045 , G06F12/02 , G06F9/50 , G06F11/07 , G06F15/173
Abstract: Techniques for implementing user-space remote memory paging are provided. In one set of embodiments, these techniques include a user-space remote memory paging (RMP) runtime that can: (1) pre-allocate one or more regions of remote memory for use by an application; (2) at a time of receiving/intercepting a memory allocation function call invoked by the application, map the virtual memory address range of the allocated local memory to a portion of the pre-allocated remote memory; (3) at a time of detecting a page fault directed to a page that is mapped to remote memory, retrieve the page via Remote Direct Memory Access (RDMA) from its remote memory location and store the retrieved page in a local main memory cache; and (4) on a periodic basis, identify pages in the local main memory cache that are candidates for eviction and write out the identified pages via RDMA to their mapped remote memory locations if they have been modified.
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公开(公告)号:US10908912B1
公开(公告)日:2021-02-02
申请号:US16521407
申请日:2019-07-24
Applicant: VMware, Inc.
Inventor: Nadav Amit , Frederick Joseph Jacobs , Michael Wei
Abstract: A method for redirecting an indirect call in an operating system kernel to a direct call is disclosed. The direct calls are contained in trampoline code called an inline jump switch (IJS) or an outline jump switch (OJS). The IJS and OJS can operate in either a use mode, redirecting an indirect call to a direct call, a learning and update mode or fallback mode. In the learning and update mode, target addresses in a trampoline code template are learned and updated by a jump switch worker thread that periodically runs as a kernel process. When building the kernel binary, a plug-in is integrated into the kernel. The plug-in replaces call sites with a trampoline code template containing a direct call so that the template can be later updated by the jump switch worker thread.
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公开(公告)号:US10713353B2
公开(公告)日:2020-07-14
申请号:US16016254
申请日:2018-06-22
Applicant: VMware, Inc.
Inventor: Michael Wei , Dan Tsafrir , Nadav Amit
Abstract: The present disclosure addresses the meltdown vulnerability resulting from speculative execution in a multi-core processing system. The operating system (OS) can be loaded for execution on one of several processing cores (OS core), while an application can be loaded for execution on another of the processing cores (application core). The OS core uses process page tables that map the entire kernel address space to physical memory. Conversely, the application core uses pages tables that map only a portion of the kernel address space to physical memory.
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公开(公告)号:US20190179794A1
公开(公告)日:2019-06-13
申请号:US15836577
申请日:2017-12-08
Applicant: VMware, Inc.
Inventor: Michael Wei , Marcos Aguilera , Irina Calciu , Stanko Novakovic , Lalith Suresh , Jayneel Gandhi , Nadav Amit , Pratap Subrahmanyam , Xavier Deguillard , Kiran Tati , Rajesh Venkatasubramanian
IPC: G06F15/173 , G06F17/30
CPC classification number: G06F15/17331 , G06F16/183
Abstract: Exemplary methods, apparatuses, and systems include a distributed memory agent within a first node intercepting an operating system request to open a file from an application running on the first node. The request includes a file identifier, which the distributed memory agent transmits to a remote memory manager. The distributed memory agent receives, from the remote memory manager, a memory location within a second node for the file identifier and information to establish a remote direct memory access channel between the first node and the second node. In response to the request to open the file, the distributed memory agent establishes the remote direct memory access channel between the first node and the second node. The remote direct memory access channel allows the first node to read directly from or write directly to the memory location within the second node while bypassing an operating system of the second node.
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公开(公告)号:US20180157596A1
公开(公告)日:2018-06-07
申请号:US15370421
申请日:2016-12-06
Applicant: VMware, Inc.
Inventor: Nadav Amit
IPC: G06F12/1009 , G06F12/1027 , G06F9/455
CPC classification number: G06F12/1009 , G06F9/45558 , G06F2009/45583 , G06F2212/65
Abstract: Techniques for implementing trapless shadow page tables in a virtualized host system are provided. In one embodiment, an SPT accelerator device of the host system can intercept a memory write operation originating from a virtual machine (VM) and directed to a guest OS page table of the VM, where the guest OS page table is stored in a device memory of the SPT accelerator device. The SPT accelerator device can further extract a guest virtual address (GVA)-to-guest physical address (GPA) mapping in the memory write instruction and can translate the GVA-to-GPA mapping into a GVA-to-host physical address (HPA) mapping. The SPT accelerator device can then write the GVA-to-HPA mapping to a shadow page table of the host system.
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公开(公告)号:US11321242B2
公开(公告)日:2022-05-03
申请号:US17021834
申请日:2020-09-15
Applicant: VMware, Inc.
Inventor: Michael Wei , Nadav Amit , Amy Tai
IPC: G06F12/1027 , G06F12/0804 , G06F9/48 , G06F12/1009
Abstract: Techniques for implementing early acknowledgement for translation lookaside buffer (TLB) shootdowns are provided. In one set of embodiments, a first (i.e., remote) processing core of a computer system can receive an inter-processor interrupt (IPI) from a second (i.e., initiator) processing core of the computer system for performing a TLB shootdown of the first processing core. Upon receiving the IPI, an interrupt handler of the first processing core can communicate an acknowledgement to the second processing core that the TLB of the first processing core has been flushed, prior to actually flushing the TLB.
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公开(公告)号:US20220083476A1
公开(公告)日:2022-03-17
申请号:US17021834
申请日:2020-09-15
Applicant: VMware, Inc.
Inventor: Michael Wei , Nadav Amit , Amy Tai
IPC: G06F12/1027 , G06F12/0804 , G06F12/1009 , G06F9/48
Abstract: Techniques for implementing early acknowledgement for translation lookaside buffer (TLB) shootdowns are provided. In one set of embodiments, a first (i.e., remote) processing core of a computer system can receive an inter-processor interrupt (IPI) from a second (i.e., initiator) processing core of the computer system for performing a TLB shootdown of the first processing core. Upon receiving the IPI, an interrupt handler of the first processing core can communicate an acknowledgement to the second processing core that the TLB of the first processing core has been flushed, prior to actually flushing the TLB.
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公开(公告)号:US20210026785A1
公开(公告)日:2021-01-28
申请号:US16519616
申请日:2019-07-23
Applicant: VMware, Inc.
Inventor: Michael Wei , Nadav Amit
IPC: G06F12/14 , G06F12/0882 , G06F9/455 , G06F21/12 , G06F21/54
Abstract: One or more kernel-modifying procedures are stored in a trusted computing base (TCB) when bringing up a guest operating system (OS) on a virtual machine (VM) on a virtualization platform. When the guest OS invokes an OS-level kernel-modifying procedure, a call is made to the hypervisor. If the hypervisor determines the TCB to be valid, the kernel-modifying procedure in the TCB that corresponds to the OS-level kernel-modifying procedure is invoked so that the kernel code can be modified.
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公开(公告)号:US10706005B2
公开(公告)日:2020-07-07
申请号:US15836577
申请日:2017-12-08
Applicant: VMware, Inc.
Inventor: Michael Wei , Marcos Aguilera , Irina Calciu , Stanko Novakovic , Lalith Suresh , Jayneel Gandhi , Nadav Amit , Pratap Subrahmanyam , Xavier Deguillard , Kiran Tati , Rajesh Venkatasubramanian
IPC: G06F15/173 , G06F16/182
Abstract: Exemplary methods, apparatuses, and systems include a distributed memory agent within a first node intercepting an operating system request to open a file from an application running on the first node. The request includes a file identifier, which the distributed memory agent transmits to a remote memory manager. The distributed memory agent receives, from the remote memory manager, a memory location within a second node for the file identifier and information to establish a remote direct memory access channel between the first node and the second node. In response to the request to open the file, the distributed memory agent establishes the remote direct memory access channel between the first node and the second node. The remote direct memory access channel allows the first node to read directly from or write directly to the memory location within the second node while bypassing an operating system of the second node.
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