公开(公告)号：US11726807B2

公开(公告)日：2023-08-15

申请号：US15588392

申请日：2017-05-05

Applicant: VMware, Inc.

Inventor： Nadav Amit ,  Michael Wei ,  Cheng Chun Tu

IPC: G06F9/455 ,  G06F21/60 ,  G06F21/53

CPC classification number: G06F9/45558 ,  G06F21/53 ,  G06F21/60 ,  G06F2009/45587

Abstract: A hypervisor communicates with a guest operating system running in a virtual machine supported by the hypervisor using a hyper-callback whose functions are based on the particular guest operating system running the virtual machine and are triggered by one or more events in the guest operating system. The functions are modified to make sure they are safe to execute and to allow only limited access to the guest operating system. Additionally, the functions are converted to byte code corresponding to a simplified CPU and memory model and are safety checked by the hypervisor when registered with the hypervisor. The functions are executed by the hypervisor without any context switch between the hypervisor and guest operating system, and when executed, provide information about the particular guest operating system, allowing the hypervisor to improve operations such as page reclamation, virtual CPU scheduling, I/O operations, and tracing of the guest operating system.

公开(公告)号：US20220083468A1

公开(公告)日：2022-03-17

申请号：US17021872

申请日：2020-09-15

Applicant: VMware, Inc.

Inventor： Michael Wei ,  Nadav Amit ,  Amy Tai

IPC: G06F12/0802 ,  G06F9/4401

Abstract: Techniques for consolidating shared state for translation lookaside buffer (TLB) shootdowns are provided. In one set of embodiments, an operating system (OS) kernel of a computer system can co-locate, in a system memory of the computer system, a plurality of shared data accessed by first and second processing cores of the computer system for performing a translation lookaside buffer (TLB) shootdown of the first processing core by the second processing core, where the co-locating allows the plurality of shared data to occupy a single cache line when brought from the system memory into a CPU (central processing unit) cache of the first or second processing core. This can include, e.g., (1) co-locating a lazy mode indicator and a call function queue (CFQ) head element of the first processing core, such that these two data components occupy the same cache line, and (2) co-locating a TLB flush info entry and a call function data (CFD) entry created by the second processing core at the time of initiating the TLB shootdown, such that these two data components occupy the same cache line.

公开(公告)号：US11068422B1

公开(公告)日：2021-07-20

申请号：US16804480

申请日：2020-02-28

Applicant: VMware, Inc.

Inventor： Amy Tai ,  Igor Smolyar ,  Dan Tsafrir ,  Michael Wei ,  Nadav Amit

IPC: G06F13/24 ,  G06F3/06 ,  G06F13/10

Abstract: Described herein are embodiments that adaptively reduce the number of interrupts that occur between a device controller and a computer system. Device commands are submitted to the controller by an operating system on behalf of an application. The device performs the received commands and indicates command completions to the controller. A counter counts completions, and if the count exceeds a threshold number, the controller generates an interrupt to the computer system. If the count is greater than zero and the timeout interval has expired, then the controller generates an interrupt to the computer system. In some embodiments, the application attaches flags to one of the commands indicating that an interrupt relating to completion of the flagged command should be generated as soon as possible or that an interrupt relating to completion of all commands prior to and including the flagged command should be generated as soon as possible.

公开(公告)号：US11003472B2

公开(公告)日：2021-05-11

申请号：US16257531

申请日：2019-01-25

Applicant: VMware, Inc.

Inventor： Eric Schkufza ,  Michael Wei

IPC: G06F9/455 ,  G06F30/331

Abstract: A system and method are disclosed for executing a hardware component of a design in a hardware engine, where the component includes a pre-compiled library component. The hardware component is compiled to include an interface that supports a ‘forward( )’ function which, when invoked, requests that the hardware engine running the hardware component run such that interactions between the library component and the hardware component occur without communicating with the runtime system because interactions between the library component and the hardware component are handled locally by the hardware engine and not the runtime system. Handling the library component without the runtime system intervening allows the library component to run at a speed that is close to the native speed of the target re-programmable hardware fabric. In addition, library components targeted to the specific reprogrammable hardware fabric are available to the design without compilation.

公开(公告)号：US10885247B2

公开(公告)日：2021-01-05

申请号：US15881654

申请日：2018-01-26

Applicant: VMware, Inc.

Inventor： Eric Schkufza ,  Michael Wei

IPC: G06F30/331 ,  G06F9/455

Abstract: A method for implementing a distributed hardware system includes retrieving a hardware design described in a hardware description language, where the hardware design includes a plurality of components. The method further includes, for each component of the hardware design, sending the component to a hardware compiler and to one of a plurality of software engines, where the hardware compiler compiles the component to run in one of a plurality of hardware engines and the one software engine simulates the component while the hardware compiler compiles the component for the one hardware engine, and upon completion of the compilation of the component, sending the compiled component to one of the hardware engines to be executed by the one hardware engine and monitoring communication so that the one hardware engine can interact with other components in other hardware engines or software engines.

公开(公告)号：US10819611B2

公开(公告)日：2020-10-27

申请号：US16211027

申请日：2018-12-05

Applicant: VMware, Inc.

Inventor： Zeeshan Lokhandwala ,  Medhavi Dhawan ,  Dahlia Malkhi ,  Michael Wei ,  Maithem Munshed ,  Ragnar Edholm

IPC: H04L12/26 ,  H04L12/707 ,  H04L12/24

Abstract: Techniques for implementing dynamic timeout-based fault detection in a distributed system are provided. In one set of embodiments, a node of the distributed system can set a timeout interval to a minimum value and transmit poll messages to other nodes in the distributed system. The node can further wait for acknowledgement messages from all of the other nodes, where the acknowledgement messages are responsive to the poll messages, and can check whether it has received the acknowledgement messages from all of the other nodes within the timeout interval. If the node has failed to receive an acknowledgement message from at least one of the other nodes within the timeout interval and if the timeout interval is less than a maximum value, the node can increment the timeout interval by a delta value and can repeat the setting, the transmitting, the waiting, and the checking steps.

公开(公告)号：US20190243776A1

公开(公告)日：2019-08-08

申请号：US15960467

申请日：2018-04-23

Applicant: VMware, Inc.

Inventor： Nadav Amit ,  Dan Tsafrir ,  Michael Wei

IPC: G06F12/1009 ,  G06F12/14 ,  G06F21/57

Abstract: Embodiments are disclosed to mitigate the meltdown vulnerability by selectively using page table isolation. Page table isolation is enabled for 64-bit applications, so that unprivileged areas in the kernel address space cannot be accessed in user mode due to speculative execution by the processor. On the other hand, page table isolation is disabled for 32-bit applications thereby providing mapping into unprivileged areas in the kernel address space. However, speculative execution is limited to a 32-bit address space in a 32-bit application, and s access to unprivileged areas in the kernel address space can be inhibited.

公开(公告)号：US11500787B2

公开(公告)日：2022-11-15

申请号：US16519616

申请日：2019-07-23

Applicant: VMware, Inc.

Inventor： Michael Wei ,  Nadav Amit

IPC: G06F9/455 ,  G06F12/14 ,  G06F12/0882 ,  G06F21/12 ,  G06F21/54

Abstract: One or more kernel-modifying procedures are stored in a trusted computing base (TCB) when bringing up a guest operating system (OS) on a virtual machine (VM) on a virtualization platform. When the guest OS invokes an OS-level kernel-modifying procedure, a call is made to the hypervisor. If the hypervisor determines the TCB to be valid, the kernel-modifying procedure in the TCB that corresponds to the OS-level kernel-modifying procedure is invoked so that the kernel code can be modified.

公开(公告)号：US20220229590A1

公开(公告)日：2022-07-21

申请号：US17153265

申请日：2021-01-20

Applicant: VMware, Inc.

Inventor： Amy Tai ,  Michael Wei

IPC: G06F3/06

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for enforcing a decay policy for a data object. One of the methods includes receiving a request to store a data object in a storage device; obtaining a user policy identifying a lifetime of the data object; determining, using the lifetime of the data object, a voltage policy for a plurality of memory cells of the storage device, wherein: each of the plurality of memory cells will store one or more bits of the data object; the voltage policy identifies a voltage to provide each memory cell; and an expected time at which raw bit errors of the data object will cause the data object to decay is equal to a time point identified by the lifetime of the data object; and storing the data object in the storage device according to the determined voltage policy.

公开(公告)号：US11341051B2

公开(公告)日：2022-05-24

申请号：US17021872

申请日：2020-09-15

Applicant: VMware, Inc.

Inventor： Michael Wei ,  Nadav Amit ,  Amy Tai

IPC: G06F12/08 ,  G06F12/0802 ,  G06F9/4401

Abstract: Techniques for consolidating shared state for translation lookaside buffer (TLB) shootdowns are provided. In one set of embodiments, an operating system (OS) kernel of a computer system can co-locate, in a system memory of the computer system, a plurality of shared data accessed by first and second processing cores of the computer system for performing a translation lookaside buffer (TLB) shootdown of the first processing core by the second processing core, where the co-locating allows the plurality of shared data to occupy a single cache line when brought from the system memory into a CPU (central processing unit) cache of the first or second processing core. This can include, e.g., (1) co-locating a lazy mode indicator and a call function queue (CFQ) head element of the first processing core, such that these two data components occupy the same cache line, and (2) co-locating a TLB flush info entry and a call function data (CFD) entry created by the second processing core at the time of initiating the TLB shootdown, such that these two data components occupy the same cache line.