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公开(公告)号：US20210364841A1
公开(公告)日：2021-11-25
申请号：US16334079
申请日：2018-11-13
发明人： Xibin Shao , Yingying Qu , Yujie Gao
IPC分类号： G02F1/1339 , G02F1/1335
摘要： A liquid crystal display panel is disclosed, including an array substrate (01) comprising a plurality of sub-pixels, an opposite substrate (02) opposite the array substrate (01), a liquid crystal layer (03) between the array substrate (01) and the opposite substrate (01), and a plurality of spacers (04) between the array substrate (01) and the opposite substrate (02). The plurality of spacers (04) may respectively be in areas between the adjacent sub-pixels. Each of the plurality of the spacers (04) may include a first sub-spacer (041) and a second sub-spacer (042). The first sub-spacer (041) may be formed on a side of the array substrate (01) facing the opposite substrate (02). The second sub-spacer (042) may be formed on a side of the opposite substrate (02) facing the array substrate (01). A side of the first sub-spacer (041) facing the opposite substrate (02) may be in contact with a side of the second sub-spacer (042) facing the array substrate (01).
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公开(公告)号：US20210223647A1
公开(公告)日：2021-07-22
申请号：US16629313
申请日：2019-08-27
发明人： Xiaoyuan Wang , Wu Wang , Yan Fang , Ruilin Bi , Yajie Bai , Yujie Gao , Seungmin Lee
IPC分类号： G02F1/1362 , G02F1/1368
摘要： An array substrate includes a base substrate; a data line and a common electrode line on the base substrate; and a first gate line and a second gate line on the base substrate, wherein both the first gate line and the second gate line cross both the data line and the common electrode line to define a sub-pixel. The sub-pixel includes: a pixel electrode; a common electrode; and an insulating layer between the pixel electrode and the common electrode. The common electrode includes a plurality of slits, and the slits extend in the same direction as the data line. The slits include a first slit close to the data line, the pixel electrode includes a first side surface close to the data line, and an orthographic projection of the first side surface on the base substrate is located within an orthographic projection of the first slit on the base substrate.
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13.发明授权公开(公告)号：US10217391B2
公开(公告)日：2019-02-26
申请号：US15541639
申请日：2016-09-18
发明人： Guangliang Shang , Xing Yao , Seungwoo Han , Yujie Gao , Yuanbo Zhang , Ming Chen , Jungmok Jun , Xue Dong
IPC分类号： G11C19/28 , G09G3/32 , G09G3/36 , G09G3/20 , G09G3/3266
摘要： Disclosed is a shift register unit, a gate driving circuit and a driving method, as well as a display apparatus. The shift register unit has a working cycle including an input phase, an output phase, a reset phase and a maintaining phase. In the reset phase, a clock signal is transmitted to an output terminal to pull a voltage of the output terminal down to a reference voltage, and the pulled-down voltage of the output terminal is subsequently changed from the reference voltage to a gate-off voltage. In the maintaining phase, the voltage of the output terminal is maintained at the gate-off voltage. The reference voltage is smaller than the gate-off voltage.
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14.发明申请公开(公告)号：US20180204494A1
公开(公告)日：2018-07-19
申请号：US15541639
申请日：2016-09-18
发明人： Guangliang Shang , Xing Yao , Seungwoo Han , Yujie Gao , Yuanbo Zhang , Ming Chen , Jungmok Jun , Xue Dong
CPC分类号： G09G3/20 , G09G3/3266 , G09G3/3677 , G09G2300/0408 , G09G2310/0267 , G09G2310/0286 , G11C19/28 , G11C19/287
摘要： Disclosed is a shift register unit, a gate driving circuit and a driving method, as well as a display apparatus. The shift register unit has a working cycle including an input phase, an output phase, a reset phase and a maintaining phase. In the reset phase, a clock signal is transmitted to an output terminal to pull a voltage of the output terminal down to a reference voltage, and the pulled-down voltage of the output terminal is subsequently changed from the reference voltage to a gate-off voltage. In the maintaining phase, the voltage of the output terminal is maintained at the gate-off voltage. The reference voltage is smaller than the gate-off voltage.
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公开(公告)号：US10423026B2
公开(公告)日：2019-09-24
申请号：US15869733
申请日：2018-01-12
发明人： Yujie Gao
IPC分类号： G02F1/1362 , G02F1/1335 , G02F1/1333
摘要： An array substrate, a display panel and a display device. The array substrate includes a base substrate including a plurality of pixel areas and a first data line on the base substrate and between adjacent pixel areas; a side slope angle of the first data line is not greater than about 60°.
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公开(公告)号：US10255985B2
公开(公告)日：2019-04-09
申请号：US15503830
申请日：2016-08-25
发明人： Mingfu Han , Guangliang Shang , Yuanbo Zhang , Yujie Gao , Yan Yan , Yingmeng Miao , Seungwoo Han , Zhihe Jin , Xing Yao , Haoliang Zheng
摘要： A supplement resetting module for a gate driver circuit, including a pull-up control unit, a pull-down control unit, a clock signal input end, a predetermined level input end, a first control signal input end, a second control signal input end and a signal output end. A control end of the pull-up control unit is connected to the clock signal input end, an output end of the pull-up control unit is connected to the signal output end, a first control end of the pull-down control unit is connected to the first control signal input end, a second control end of the pull-down control unit is connected to the second control signal input end, an input end of the pull-down control unit is connected to the predetermined level input end, and an output end of the pull-down control unit is connected to the signal output end.
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公开(公告)号：US09971219B1
公开(公告)日：2018-05-15
申请号：US15704170
申请日：2017-09-14
发明人： Deqiang Liu , Feifei Wang , Zhihua Sun , Yujie Gao , Honglin Zhang , Hebin Zhao
IPC分类号： G02F1/1362
CPC分类号： G02F1/136286 , G02F1/1339 , G02F1/136227 , G02F2001/136222 , G02F2201/50
摘要： Embodiments of the present disclosure provide an array substrate, a color filter substrate and a display panel. The array substrate includes: a base substrate; gate lines and data lines provided above the base substrate in a cross arrangement; and a plurality of pixel units defined by the gate lines and the data lines, each pixel unit including a pixel region and a non-pixel region. At least a portion of the gate line is located in the non-pixel region, a blocking wall region is formed in the non-pixel region and located between the portion of the gate line located in the non-pixel region and the pixel region, and a blocking wall structure for blocking movement of a spacer from the non-pixel region to the pixel region is formed in the blocking wall region.
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公开(公告)号：US09171869B1
公开(公告)日：2015-10-27
申请号：US14573732
申请日：2014-12-17
发明人： Yujie Gao , Sangjin Park
IPC分类号： H01L23/58 , H01L27/12 , G02F1/1368 , H01L21/66
CPC分类号： G02F1/1368 , G02F2001/136254 , H01L22/32 , H01L22/34
摘要： The present invention provides an array substrate and a display device, to solve the problem of low testing precision due to significant difference between characteristics of TFTs in the detecting region and TFTs in the display region in the prior art. The array substrate comprises a display region and a dummy pixel region provided in the periphery of the display region, wherein, at least one detecting unit is provided in the dummy pixel region, each detecting unit comprises one second pixel unit, one thin film transistor is provided correspondingly to each second pixel unit, and respective electrodes of each thin film transistor provided correspondingly to the second pixel unit are connected to an external test device through test lines, respectively.
摘要翻译： 本发明提供了阵列基板和显示装置，以解决现有技术中检测区域中的TFT的特性与显示区域中的TFT之间的显着差异的测试精度低的问题。 阵列基板包括显示区域和设置在显示区域周边的虚拟像素区域，其中至少一个检测单元设置在虚拟像素区域中，每个检测单元包括一个第二像素单元，一个薄膜晶体管是 相应于每个第二像素单元设置，并且相应于第二像素单元设置的每个薄膜晶体管的各个电极分别通过测试线连接到外部测试装置。
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