Method for detecting short burst errors in LDPC system
    11.
    发明授权
    Method for detecting short burst errors in LDPC system 有权
    用于检测LDPC系统中短脉冲串错误的方法

    公开(公告)号:US08201051B2

    公开(公告)日:2012-06-12

    申请号:US12287959

    申请日:2008-10-15

    IPC分类号: H03M13/00

    CPC分类号: H03M13/1128 H03M13/17

    摘要: The present invention is a device for detecting short burst errors. The device includes a first signal input, wherein the first signal input is configured to receive a first signal. The device includes a second signal input, wherein the second signal input is configured to receive a second signal. The device includes a logic gate, wherein the logic gate is operable for receiving the first signal vial the first signal input, receiving the second signal via the second signal input, and generating a logic output gate signal based on the received first signal and the second signal. Furthermore, the device includes a filter, wherein the filter is configured for receiving the logic output gate signal from the logic gate and generates a filter output signal based upon the received logic output gate signal, wherein the filter output signal is operable for flagging errors.

    摘要翻译: 本发明是用于检测短脉冲串错误的装置。 该设备包括第一信号输入,其中第一信号输入被配置为接收第一信号。 该设备包括第二信号输入,其中第二信号输入被配置为接收第二信号。 该装置包括逻辑门,其中逻辑门可操作用于接收第一信号输入端,第一信号输入端,经由第二信号输入端接收第二信号,并根据接收到的第一信号和第二信号产生逻辑输出门信号 信号。 此外,该器件包括滤波器,其中滤波器被配置为从逻辑门接收逻辑输出门信号,并且基于接收的逻辑输出门信号产生滤波器输出信号,其中滤波器输出信号可用于标记误差。

    Using short burst error detector in a queue-based system
    12.
    发明申请
    Using short burst error detector in a queue-based system 有权
    在基于队列的系统中使用短脉冲串错误检测器

    公开(公告)号:US20090276689A1

    公开(公告)日:2009-11-05

    申请号:US12380237

    申请日:2009-02-25

    IPC分类号: G06F11/07

    摘要: A system, method, and device for detecting short burst errors in a queue-based system is disclosed. A first detector performs a data detection on a first input data set at a first time and on a second input data set at a second time. A second detector performs a data re-detection on input data sets. A decoder decodes derivations of the outputs of the first and second detector. A short burst error detector may perform a short burst error detection on decoded data and erase any detected errors. An output data buffer stores and orders the decoded data for output.

    摘要翻译: 公开了一种用于检测基于队列的系统中的短脉冲串错误的系统,方法和装置。 第一检测器在第一时间对第一输入数据集合和第二输入数据集进行数据检测。 第二检测器对输入数据集执行数据重新检测。 解码器解码第一和第二检测器的输出的导数。 短脉冲串错误检测器可对解码数据执行短脉冲串错误检测,并擦除任何检测到的错误。 输出数据缓冲器存储并排序解码数据进行输出。

    Systems and methods for enhanced flaw scan in a data processing device
    13.
    发明授权
    Systems and methods for enhanced flaw scan in a data processing device 有权
    用于在数据处理设备中增强缺陷扫描的系统和方法

    公开(公告)号:US08176400B2

    公开(公告)日:2012-05-08

    申请号:US12556180

    申请日:2009-09-09

    IPC分类号: H03M13/00

    CPC分类号: H04L1/0057 H04L1/0045

    摘要: Various embodiments of the present invention provide systems and methods for flaw scan in a data processing system. As one example, a data processing system is disclosed that includes a data detector circuit, a bit sign inverting circuit, and an LDPC decoder circuit. The data detector circuit receives a verification data set that is an invalid LDPC codeword, and applies a data detection algorithm to the verification data set to yield a detected output. The bit sign inverting circuit modifies the sign of one or more elements of a first derivative of the detected output to yield a second derivative of the detected output. The second derivative of the detected output is an expected valid LDPC codeword. The LDPC decoder circuit applies a decoding algorithm to the second derivative of the detected output to yield a decoded output.

    摘要翻译: 本发明的各种实施例提供了在数据处理系统中的缺陷扫描的系统和方法。 作为一个示例,公开了包括数据检测器电路,位符号反相电路和LDPC解码器电路的数据处理系统。 数据检测器电路接收作为无效LDPC码字的验证数据集,并将数据检测算法应用于验证数据集以产生检测到的输出。 位符号反相电路修改检测输出的一阶导数的一个或多个元素的符号,以产生检测到的输出的二阶导数。 所检测的输出的二阶导数是期望的有效LDPC码字。 LDPC解码器电路将解码算法应用于检测输出的二阶导数,以产生解码输出。

    Systems and methods for storage channel testing
    14.
    发明授权
    Systems and methods for storage channel testing 有权
    存储通道测试的系统和方法

    公开(公告)号:US07990642B2

    公开(公告)日:2011-08-02

    申请号:US12425757

    申请日:2009-04-17

    IPC分类号: G11B27/36

    CPC分类号: G11B20/182 G11B2220/2516

    摘要: Various embodiments of the present invention provide systems and methods for validating elements of storage devices. A an example, various embodiments of the present invention provide semiconductor devices that include a write path circuit, a read path circuit and a validation circuit. The write path circuit is operable to receive a data input and to convert the data input into write data suitable for storage to a storage medium. The read path circuit is operable to receive read data and to convert the read data into a data output. The validation circuit is operable to: receive the write data, augment the write data with a first noise sequence to yield a first augmented data series; and augment a derivative of the first augmented data series with a second noise sequence to yield the read data.

    摘要翻译: 本发明的各种实施例提供用于验证存储设备的元件的系统和方法。 作为示例,本发明的各种实施例提供包括写入路径电路,读取路径电路和验证电路的半导体器件。 写入路径电路可操作用于接收数据输入并将数据输入转换成适合于存储的写数据到存储介质。 读路径电路可操作以接收读数据并将读数据转换为数据输出。 验证电路可操作以:接收写入数据,用第一噪声序列增加写入数据以产生第一增强数据序列; 并且用第二噪声序列来增加第一增强数据序列的导数以产生读取的数据。

    Systems and Methods for Enhanced Media Defect Detection
    15.
    发明申请
    Systems and Methods for Enhanced Media Defect Detection 有权
    增强介质缺陷检测的系统和方法

    公开(公告)号:US20100226033A1

    公开(公告)日:2010-09-09

    申请号:US12399713

    申请日:2009-03-06

    IPC分类号: G11B5/09

    摘要: Various embodiments of the present invention provide systems and methods for detecting storage medium defects. As one example, a media defect detection system is disclosed that includes a data detector circuit that applies a detection algorithm to the data input and provides a hard output and a soft output. A first circuit combines a first derivative of the hard output with a derivative of the data input to yield a first combined signal. A second circuit combines a second derivative of the hard output with a derivative of the first combined signal to yield a second combined signal. A third circuit combines a derivative of the soft output with the second combined signal and a threshold value to yield a defect signal.

    摘要翻译: 本发明的各种实施例提供了用于检测存储介质缺陷的系统和方法。 作为一个示例,公开了一种媒体缺陷检测系统,其包括将检测算法应用于数据输入并提供硬输出和软输出的数据检测器电路。 第一电路将硬输出的一阶导数与数据输入的导数组合以产生第一组合信号。 第二电路将硬输出的二阶导数与第一组合信号的导数组合以产生第二组合信号。 第三电路将软输出的导数与第二组合信号和阈值组合以产生缺陷信号。

    Method for detecting short burst errors in LDPC system
    16.
    发明申请
    Method for detecting short burst errors in LDPC system 有权
    用于检测LDPC系统中短脉冲串错误的方法

    公开(公告)号:US20100091629A1

    公开(公告)日:2010-04-15

    申请号:US12287959

    申请日:2008-10-15

    IPC分类号: G11B27/36

    CPC分类号: H03M13/1128 H03M13/17

    摘要: The present invention is a device for detecting short burst errors. The device includes a first signal input, wherein the first signal input is configured to receive a first signal. The device includes a second signal input, wherein the second signal input is configured to receive a second signal. The device includes a logic gate, wherein the logic gate is operable for receiving the first signal vial the first signal input, receiving the second signal via the second signal input, and generating a logic output gate signal based on the received first signal and the second signal. Furthermore, the device includes a filter, wherein the filter is configured for receiving the logic output gate signal from the logic gate and generates a filter output signal based upon the received logic output gate signal, wherein the filter output signal is operable for flagging errors.

    摘要翻译: 本发明是用于检测短脉冲串错误的装置。 该设备包括第一信号输入,其中第一信号输入被配置为接收第一信号。 该设备包括第二信号输入,其中第二信号输入被配置为接收第二信号。 该装置包括逻辑门,其中逻辑门可操作用于接收第一信号输入端,第一信号输入端,经由第二信号输入端接收第二信号,并根据接收到的第一信号和第二信号产生逻辑输出门信号 信号。 此外,该器件包括滤波器,其中滤波器被配置为从逻辑门接收逻辑输出门信号,并且基于接收的逻辑输出门信号产生滤波器输出信号,其中滤波器输出信号可用于标记误差。

    Detection of signal disturbance in a partial response channel
    17.
    发明申请
    Detection of signal disturbance in a partial response channel 有权
    检测部分响应信道中的信号干扰

    公开(公告)号:US20070146917A1

    公开(公告)日:2007-06-28

    申请号:US11319319

    申请日:2005-12-28

    IPC分类号: G11B20/10

    CPC分类号: G11B20/18 G11B5/6076

    摘要: In one embodiment, irregular electronic disturbance signals in a partial-response read channel are detected by a disturbance detector using state metrics generated by maximum-likelihood sequence detector. For example, a thermal asperity (TA) detector detects the occurrence of TAs in the read channel of perpendicularly recorded magnetic media by using the state metrics generated by a Viterbi detector. Changes in state metrics (e.g., magnitudes of the branch metrics of the trellis diagram) used by the Viterbi detector are tracked. If the magnitude of the rise of the path metric increases above a set threshold, then a TA is detected. Alternatively, or additionally, the rate of change of the magnitude of the path metrics is tracked. If the rate of change within a set time window is above a specified threshold, then a TA is detected.

    摘要翻译: 在一个实施例中,部分响应读通道中的不规则电子干扰信号由使用由最大似然序列检测器产生的状态度量的扰动检测器检测。 例如,热绝缘(TA)检测器通过使用维特比检测器产生的状态度量来检测垂直记录的磁介质的读通道中的TA的出现。 跟踪由维特比检测器使用的状态度量(例如格子图的分支度量的大小)的变化。 如果路径度量的上升幅度增加到设定的阈值以上,则检测TA。 或者或另外,跟踪路径度量的幅度的变化率。 如果设定的时间窗内的变化率高于规定的阈值,则检测出TA。

    Detection of signal disturbance in a partial response channel
    18.
    发明授权
    Detection of signal disturbance in a partial response channel 有权
    检测部分响应信道中的信号干扰

    公开(公告)号:US07679853B2

    公开(公告)日:2010-03-16

    申请号:US11319319

    申请日:2005-12-28

    IPC分类号: G11B5/02

    CPC分类号: G11B20/18 G11B5/6076

    摘要: In one embodiment, irregular electronic disturbance signals in a partial-response read channel are detected by a disturbance detector using state metrics generated by maximum-likelihood sequence detector. For example, a thermal asperity (TA) detector detects the occurrence of TAs in the read channel of perpendicularly recorded magnetic media by using the state metrics generated by a Viterbi detector. Changes in state metrics (e.g., magnitudes of the branch metrics of the trellis diagram) used by the Viterbi detector are tracked. If the magnitude of the rise of the path metric increases above a set threshold, then a TA is detected. Alternatively, or additionally, the rate of change of the magnitude of the path metrics is tracked. If the rate of change within a set time window is above a specified threshold, then a TA is detected.

    摘要翻译: 在一个实施例中,部分响应读通道中的不规则电子干扰信号由使用由最大似然序列检测器产生的状态度量的扰动检测器检测。 例如,热绝缘(TA)检测器通过使用维特比检测器产生的状态度量来检测垂直记录的磁介质的读通道中的TA的出现。 跟踪由维特比检测器使用的状态度量(例如格子图的分支度量的大小)的变化。 如果路径度量的上升幅度增加到设定的阈值以上,则检测TA。 或者或另外,跟踪路径度量的幅度的变化率。 如果设定的时间窗内的变化率高于规定的阈值,则检测出TA。

    Systems and methods for auto scaling in a data processing system
    19.
    发明授权
    Systems and methods for auto scaling in a data processing system 有权
    用于数据处理系统中自动缩放的系统和方法

    公开(公告)号:US08854753B2

    公开(公告)日:2014-10-07

    申请号:US13050129

    申请日:2011-03-17

    摘要: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit having a data detection circuit is disclosed that includes: a scaling circuit, a soft output calculation circuit, and a factor calculation circuit. The scaling circuit is operable to scale a branch metric value by a scaling factor to yield a scaled output. The soft output calculation circuit is operable to calculate a soft output based at least in part on the scaled output. The factor calculation circuit operable to modify the scaling factor based at least in part on the soft output.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,公开了具有数据检测电路的数据处理电路,其包括:缩放电路,软输出计算电路和因子计算电路。 缩放电路可操作以通过缩放因子缩放分支度量值以产生缩放的输出。 软输出计算电路可操作以至少部分地基于缩放的输出来计算软输出。 因子计算电路可操作以至少部分地基于软输出来修改缩放因子。

    Systems and Methods for Auto Scaling in a Data Processing System
    20.
    发明申请
    Systems and Methods for Auto Scaling in a Data Processing System 有权
    数据处理系统中自动缩放的系统和方法

    公开(公告)号:US20120236430A1

    公开(公告)日:2012-09-20

    申请号:US13050129

    申请日:2011-03-17

    IPC分类号: G11B5/09

    摘要: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit having a data detection circuit is disclosed that includes: a scaling circuit, a soft output calculation circuit, and a factor calculation circuit. The scaling circuit is operable to scale a branch metric value by a scaling factor to yield a scaled output. The soft output calculation circuit is operable to calculate a soft output based at least in part on the scaled output. The factor calculation circuit operable to modify the scaling factor based at least in part on the soft output.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,公开了具有数据检测电路的数据处理电路,其包括:缩放电路,软输出计算电路和因子计算电路。 缩放电路可操作以通过缩放因子缩放分支度量值以产生缩放的输出。 软输出计算电路可操作以至少部分地基于缩放的输出来计算软输出。 因子计算电路可操作以至少部分地基于软输出来修改缩放因子。