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公开(公告)号:US12073973B1
公开(公告)日:2024-08-27
申请号:US17180411
申请日:2021-02-19
Applicant: XILINX, INC.
Inventor: Jing Jing , Shuxian Wu
CPC classification number: H01F27/006 , H01F27/2804 , H01F27/2885 , H01F2027/2809
Abstract: A transformer includes a first inductor, facing in a first direction and a second inductor, facing in a second direction, the second direction opposite to the first. In one example the first and the second inductors are arranged such that the first inductor's legs extend to an area of the second inductor's head, and the second inductor's legs extend to an area of the first inductor's head.
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公开(公告)号:US09923051B1
公开(公告)日:2018-03-20
申请号:US15272292
申请日:2016-09-21
Applicant: Xilinx, Inc.
Inventor: Jing Jing , Shuxian Wu , Jane Sowards
IPC: H01L29/06 , H01L21/3205 , H01L21/768 , H01L23/48 , H01L29/78 , H01L21/761
CPC classification number: H01L29/0623 , H01L21/761 , H01L21/823481
Abstract: An example a semiconductor device includes a first circuit and a second circuit formed in a semiconductor substrate. The semiconductor device further includes a first guard structure formed in the semiconductor substrate and disposed between the first circuit and the second circuit, the first guard structure including first discontinuous pairs of n+ and p+ diffusions disposed along a first axis. The semiconductor device further includes a second guard structure formed in the semiconductor substrate and disposed between the first circuit and the second circuit, the second guard structure including second discontinuous pairs of n+ and p+ diffusions disposed along the first axis, the second discontinuous pairs of n+ and p+ diffusions being staggered with respect to the first discontinuous pairs of n+ and p+ diffusions.
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公开(公告)号:US20180076134A1
公开(公告)日:2018-03-15
申请号:US15267035
申请日:2016-09-15
Applicant: Xilinx, Inc.
Inventor: Jing Jing , Shuxian Wu , Xin X. Wu , Parag Upadhyaya
IPC: H01L23/522 , H01L49/02 , H01L21/768 , H01L23/64
CPC classification number: H01L23/5227 , H01L23/5225 , H01L23/645 , H01L28/10
Abstract: A semiconductor device includes an interconnect structure disposed over a semiconductor substrate. The interconnect structure includes a first device disposed in a first portion of the interconnect structure. A first shielding plane including a first conductive material is disposed in a second portion of the interconnect structure over the first portion of the interconnect structure. A second device is disposed in a third portion of the interconnect structure over the second portion of the interconnect structure. An isolation wall including a second conductive material is disposed in the first, second, and third portions of the interconnect structure. The isolation wall is coupled to the first shielding plane, and surrounds the first device, the first shielding plane, and the second device.
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14.
公开(公告)号:US20150145615A1
公开(公告)日:2015-05-28
申请号:US14092241
申请日:2013-11-27
Applicant: Xilinx, Inc.
Inventor: Jing Jing , Shuxian Wu , Zhaoyin D. Wu
CPC classification number: H03H7/0115 , H01L23/5223 , H01L23/5227 , H01L27/016 , H01L28/10 , H01L28/60 , H01L28/88 , H01L2924/0002 , H03H5/02 , H03H7/0138 , H05K1/16 , Y10T29/49117 , H01L2924/00
Abstract: A circuit includes a first finger capacitor having a first bus line coupled to a first plurality of finger elements and a second bus line coupled to a second plurality of finger elements. The first bus line is parallel to the second bus line. The circuit further includes an inductor having a first leg oriented perpendicular to the first bus line and the second bus line. The first leg of the inductor is coupled to a center of the first bus line.
Abstract translation: 电路包括具有耦合到第一多个指状元件的第一总线和耦合到第二多个指状元件的第二总线的第一指状电容器。 第一条总线与第二条总线平行。 电路还包括具有垂直于第一总线线路和第二总线线路定向的第一支路的电感器。 电感器的第一段耦合到第一总线的中心。
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15.
公开(公告)号:US08860180B2
公开(公告)日:2014-10-14
申请号:US13661195
申请日:2012-10-26
Applicant: Xilinx, Inc.
Inventor: Jing Jing , Shuxian Wu , Parag Upadhyaya
IPC: H01F5/04
CPC classification number: H01L28/10 , H01F17/0013 , H01L23/5227 , H01L23/645 , H01L2924/0002 , H01L2924/00
Abstract: An inductor structure implemented within a semiconductor integrated circuit includes a coil of conductive material including at least one turn and a current return encompassing the coil. The current return is formed of a plurality of interconnected metal layers of the semiconductor integrated circuit.
Abstract translation: 在半导体集成电路内实现的电感器结构包括包括至少一个匝的导电材料的线圈和包围线圈的电流返回。 电流返回由半导体集成电路的多个互连的金属层形成。
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