公开(公告)号：US11728962B2

公开(公告)日：2023-08-15

申请号：US17644066

申请日：2021-12-13

Applicant: XILINX, INC.

Inventor： Shaojun Ma ,  Chi Fung Poon ,  Kevin Zheng ,  Parag Upadhyaya

IPC: H04L7/00 ,  H03K19/21

CPC classification number: H04L7/0037 ,  H03K19/21

Abstract: Clock generation circuitry includes quadrature locked loop circuitry having first injection locked oscillator circuitry, second injection locked oscillator circuitry, and XOR circuitry. The first injection locked oscillator circuitry receives a first input signal and a second input signal and outputs first clock signals. The first input signal and the second input signal correspond to a reference clock signal. The second injection locked oscillator circuitry is coupled to outputs of the first injection locked oscillator circuitry, and receives the first clock signals and generates second clock signals. The XOR circuitry receives the second clock signals and generates a first clock signal, a second clock signal, a third clock signal, and a fourth clock signal. The frequencies of the first clock signal, the second clock signal, the third clock signal, and the fourth clock signal are greater than the frequency of the reference clock signal.

公开(公告)号：US10469090B1

公开(公告)日：2019-11-05

申请号：US15441052

申请日：2017-02-23

Applicant: Xilinx, Inc.

Inventor： Kevin Zheng

IPC: H03L7/08 ,  H03K3/03 ,  H03L7/099 ,  H03H11/04

Abstract: An example circuit includes: an inverter-based filter; a voltage regulator having an input and an output, the output of the voltage regulator providing a supply voltage to bias the inverter-based filter; a ring oscillator having a supply input and an output, the supply input of the ring oscillator coupled to the output of the voltage regulator; a control circuit coupled to the output of the ring oscillator and the input of the voltage regulator, the control circuit configured detect an oscillation frequency of the ring oscillator and to adjust the voltage regulator in response to the oscillator frequency.