Abstract:
Provided is a ceramic package for headlamp, and a headlamp module having the same. The ceramic package for headlamp includes a body part, a pair of internal electrodes, and an electrode exposing part. The body part has a cavity formed therein. The cavity is upwardly opened to expose a light emitting diode mounted on a mounting part. The pair of internal electrodes in the body part is electrically connected to the light emitting diode. The electrode exposing part is stepped at either side of the body part to upwardly expose the internal electrode to the outside.
Abstract:
A multi-layered metal line of a semiconductor device includes a semiconductor substrate; a lower metal line formed on the semiconductor substrate and recessed on a surface thereof; an insulation layer formed on the semiconductor substrate including the lower metal line and having a damascene pattern for exposing a recessed portion of the lower metal line and for delimiting an upper metal line forming region; a glue layer formed on a surface of the recessed portion of the lower metal line; a first diffusion barrier formed on the glue layer to fill the recessed portion of the lower metal line; a second diffusion barrier formed on the glue layer and the first diffusion barrier; a third diffusion barrier formed on the second diffusion barrier and a surface of the damascene pattern; and an upper metal line formed on the third diffusion barrier to fill the damascene pattern.
Abstract:
Disclosed is a method for manufacturing a semiconductor device. This method includes the step of forming a diffusion barrier film, which is interposed between a silicon film and a metal film and functions to prevent diffusion between the silicon and metal films. The diffusion barrier film is formed of a WSixNy film or a WSix film by using an ALD process.
Abstract:
A multi-layered metal line of a semiconductor device and a process of forming the same are described. The multi-layered metal line includes a lower metal line formed on a semiconductor substrate. An insulation layer is subsequently formed on the semiconductor substrate including the lower metal line and has an upper metal line forming region that exposes a portion of the lower metal line. A diffusion barrier formed on a surface of the upper metal line forming region of the insulation layer. The diffusion barrier includes a W—B—N ternary layer. An upper metal line is finally formed on the diffusion barrier to fill the upper metal line forming region of the insulation layer.
Abstract:
A metal wiring of a semiconductor device includes a semiconductor substrate; an insulating layer provided with a damascene pattern formed over the semiconductor substrate; a diffusion barrier layer which contains a RuO2 layer formed on a surface of the damascene pattern and an Al deposit-inhibiting layer formed on a portion of the RuO2 layer in both-side upper portion of the damascene pattern; and a wiring metal layer including Al formed on the diffusion barrier layer by MOCVD method in order to fill the damascene pattern.
Abstract:
A tungsten polymetal gate is made by forming a gate insulation layer and a polysilicon layer on a semiconductor substrate; depositing a barrier layer on the polysilicon layer; depositing a tungsten nucleation layer on the barrier layer through an ALD process; depositing a tungsten layer on the tungsten nucleation layer through a CVD process; depositing a hard mask layer on the tungsten layer; and etching the hard mask layer, the tungsten layer, the tungsten nucleation layer, the barrier layer, the polysilicon layer, and the gate insulation layer.
Abstract:
A compression chamber for a compression type ramen cooker is capable of cooking ramen by compression by blocking a discharge of air in a cooking container while cooking ramen. The compression chamber includes a lid, a chamber container having an upper portion on which the lid is mounted and a bottom surface to which the cooking container is coupled to seal the cooking container, a heater installed through the lid and mounted inside the chamber container to heat the water stored in the chamber container, a supply valve unit installed through the lid to supply water to the inside of the chamber container, a discharge valve unit installed through the lid to supply water in the chamber container to the cooking container, and a vapor discharge unit on a lower side of the chamber container to discharge compressed steam inside the cooking container.
Abstract:
A compression type ramen cooker according to an embodiment includes a main frame including side plates formed on both sides thereof, an upper main bar connecting the upper portions of the side plates, and a lower main bar connecting the lower portions of the side plates, a cooking vessel part rotatably mounted on the inner sides of the side plates, a compression chamber mounted above the upper main bar to seal or open the cooking vessel part by moving up and down, an induction heater rotatably mounted on the rear side of the cooking vessel part to heat the cooking vessel part, a ramen discharging part for discharging cooked ramen from the cooking vessel part, and a drain mounted in the lower end of the side plates on both sides to discard the water used for cleaning the cooking vessel part after cooking.
Abstract:
Provided is an alternating current (AC) driven light emitting device, including: a plurality of half-wave driving units respectively having at least one light emitting diode (LED) and provided in a loop connecting respective half-wave driving unit terminals; and at least one full-wave driving unit having at least one LED and connecting one node between two of the plurality of half-wave driving units to another node between another two of the plurality of half-wave driving units, at least one of the half-wave driving unit and the full-wave driving unit having a parallel connection structure of at least two LEDs. An array of LEDs appropriate to being drivable by AC is provided to secure reliability in error in operation of some LEDs.
Abstract:
A metal wiring of a semiconductor device includes a semiconductor substrate; an insulating layer provided with a damascene pattern formed over the semiconductor substrate; a diffusion barrier layer which contains a RuO2 layer formed on a surface of the damascene pattern and an Al deposit-inhibiting layer formed on a portion of the RuO2 layer in both-side upper portion of the damascene pattern; and a wiring metal layer including Al formed on the diffusion barrier layer by MOCVD method in order to fill the damascene pattern.