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公开(公告)号：US20090042321A1
公开(公告)日：2009-02-12
申请号：US12183775
申请日：2008-07-31
申请人： Yuichiro Sasaki , Tomohiro Okumura , Hiroyuki Ito , Keiichi Nakamoto , Katsumi Okashita , Bunji Mizuno
发明人： Yuichiro Sasaki , Tomohiro Okumura , Hiroyuki Ito , Keiichi Nakamoto , Katsumi Okashita , Bunji Mizuno
IPC分类号： H01L21/66 , C23C16/513
CPC分类号： H01J37/32449 , H01J37/32412 , H01J37/3244
摘要： Gas supplied to gas flow passages of a top plate from a gas supply device by gas supply lines forms flow along a vertical direction along a central axis of a substrate, so that the gas blown from gas blow holes can be made to be uniform, and a sheet resistance distribution is rotationally symmetric around a substrate center.
摘要翻译： 通过气体供给管线从气体供给装置供给到顶板的气体流路的气体沿着基板的中心轴线沿着垂直方向形成流动，从而能够使从气体吹入孔吹出的气体均匀， 薄片电阻分布围绕基板中心旋转对称。
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公开(公告)号：US20110065266A1
公开(公告)日：2011-03-17
申请号：US12517477
申请日：2008-09-03
IPC分类号： H01L21/22
CPC分类号： H01L21/2236 , H01J37/32412 , H01L29/6659
摘要： A substrate is exposed to a plasma generated from a gas containing an impurity, thereby doping a surface portion of the substrate with the impurity and thus forming an impurity region. A predetermined plasma doping time is used, which is included within a time range over which a deposition rate on the substrate by the plasma is greater than 0 nm/min and less than or equal to 5 nm/min.
摘要翻译： 将衬底暴露于由含有杂质的气体产生的等离子体，从而用杂质掺杂衬底的表面部分，从而形成杂质区域。 使用预定的等离子体掺杂时间，其包括在等离子体在衬底上的沉积速率大于0nm / min且小于或等于5nm / min的时间范围内。
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公开(公告)号：US20100255615A1
公开(公告)日：2010-10-07
申请号：US12741132
申请日：2008-10-02
IPC分类号： H01L21/66 , H01L21/383 , H01L21/479
CPC分类号： H01L21/2236 , H01L29/66803 , H01L29/7854
摘要： A fin-shaped semiconductor region is formed on a substrate, and then the substrate is placed in a chamber. Then, an ignition gas is introduced into a chamber to thereby turn the ignition gas into a plasma, and then a process gas containing an impurity is introduced into the chamber to thereby turn the process gas into a plasma. Then, a bias voltage is applied to the substrate so as to dope the semiconductor region with the impurity after confirming attenuation of an amount of the ignition gas remaining in the chamber.
摘要翻译： 在基板上形成鳍状半导体区域，然后将基板放置在室内。 然后，将点火气体引入室中，从而将点火气体转化为等离子体，然后将含有杂质的工艺气体引入室中，从而将工艺气体转化为等离子体。 然后，在确认残留在室中的点火气体的量的衰减之后，将偏置电压施加到衬底，以便掺杂杂质。
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公开(公告)号：US08258585B2
公开(公告)日：2012-09-04
申请号：US12676102
申请日：2009-04-30
IPC分类号： H01L27/088
CPC分类号： H01L29/785 , H01L29/66803
摘要： A semiconductor device includes: a fin-type semiconductor region (13) formed on a substrate (11); a gate insulating film (14) formed so as to cover an upper surface and both side surfaces of a predetermined portion of the fin-type semiconductor region (13); a gate electrode (15) formed on the gate insulating film (14); and an impurity region (17) formed on both sides of the gate electrode (15) in the fin-type semiconductor region (13). An impurity blocking portion (15a) for blocking the introduction of impurities is provided adjacent both sides of the gate electrode (15) over an upper surface of the fin-type semiconductor region (13).
摘要翻译： 半导体器件包括：形成在衬底（11）上的鳍状半导体区域（13）; 形成为覆盖所述鳍状半导体区域（13）的预定部分的上表面和两个侧面的栅极绝缘膜（14）; 形成在栅极绝缘膜（14）上的栅电极（15）; 以及形成在鳍式半导体区域（13）中的栅电极（15）的两侧的杂质区域（17）。 在鳍型半导体区域（13）的上表面上，在栅电极（15）的两侧附近设置用于阻止引入杂质的杂质阻挡部（15a）。
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15.发明授权Method for producing a semiconductor device by plasma doping a semiconductor region to form an impurity region 有权通过等离子体掺杂半导体区域以形成杂质区域来制造半导体器件的方法公开(公告)号：US08105926B2
公开(公告)日：2012-01-31
申请号：US12853840
申请日：2010-08-10
IPC分类号： H01L21/425
CPC分类号： H01L29/785 , H01L29/66803 , H01L29/78621
摘要： A semiconductor region having an upper surface and a side surface is formed on a substrate. A first impurity region is formed in an upper portion of the semiconductor region. A second impurity region is formed in a side portion of the semiconductor region. The resistivity of the second impurity region is substantially equal to or smaller than that of the first impurity region.
摘要翻译： 在基板上形成具有上表面和侧面的半导体区域。 第一杂质区形成在半导体区域的上部。 第二杂质区域形成在半导体区域的侧部。 第二杂质区的电阻率基本上等于或小于第一杂质区的电阻率。
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16.发明授权Method for producing semiconductor device and semiconductor producing apparatus 有权半导体装置及半导体制造装置的制造方法公开(公告)号：US07754503B2
公开(公告)日：2010-07-13
申请号：US12158906
申请日：2008-01-09
IPC分类号： H01L21/20
CPC分类号： H01L21/2236 , H01L29/6659 , H01L29/7833
摘要： A plasma of a gas containing an impurity is produced through a discharge in a vacuum chamber, and a plurality of substrates are successively doped with the impurity by using the plasma, wherein a plasma doping condition of a subject substrate is adjusted based on an accumulated discharge time until the subject substrate is placed in the vacuum chamber.
摘要翻译： 通过在真空室中的放电产生含有杂质的气体的等离子体，并且通过使用等离子体使多个基板依次掺杂有杂质，其中基于累积放电来调整被检体基板的等离子体掺杂状态 直到目标基板被放置在真空室中。
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17.发明申请METHOD FOR PRODUCING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PRODUCING APPARATUS 有权用于生产半导体器件的方法和制造器件的半导体器件公开(公告)号：US20100075489A1
公开(公告)日：2010-03-25
申请号：US12158906
申请日：2008-01-09
IPC分类号： H01L21/26 , C23C16/513
CPC分类号： H01L21/2236 , H01L29/6659 , H01L29/7833
摘要： A plasma of a gas containing an impurity is produced through a discharge in a vacuum chamber, and a plurality of substrates are successively doped with the impurity by using the plasma, wherein a plasma doping condition of a subject substrate is adjusted based on an accumulated discharge time until the subject substrate is placed in the vacuum chamber.
摘要翻译： 通过在真空室中的放电产生含有杂质的气体的等离子体，并且通过使用等离子体使多个基板依次掺杂有杂质，其中基于累积放电来调整被检体基板的等离子体掺杂状态 直到目标基板被放置在真空室中。
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公开(公告)号：US20090317963A1
公开(公告)日：2009-12-24
申请号：US12439298
申请日：2008-08-28
IPC分类号： H01L21/268
CPC分类号： H01J37/32449 , H01J37/32412 , H01J37/32935 , H01L21/2236
摘要： An amount of leakage of a substrate-cooling gas into a vacuum container is measured by using a flow-rate measuring device so that the flow rate of a diluting gas that is the same as the substrate-cooling gas is controlled by a control device or a plasma doping time is prolonged, in accordance with the amount of leakage.
摘要翻译： 通过使用流量测量装置测量基板冷却气体进入真空容器的泄漏量，使得与基板冷却气体相同的稀释气体的流量由控制装置控制或 根据泄漏量等离子体掺杂时间延长。
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公开(公告)号：US08030187B2
公开(公告)日：2011-10-04
申请号：US12517477
申请日：2008-09-03
IPC分类号： H01L21/00
CPC分类号： H01L21/2236 , H01J37/32412 , H01L29/6659
摘要： A substrate is exposed to a plasma generated from a gas containing an impurity, thereby doping a surface portion of the substrate with the impurity and thus forming an impurity region. A predetermined plasma doping time is used, which is included within a time range over which a deposition rate on the substrate by the plasma is greater than 0 nm/min and less than or equal to 5 nm/min.
摘要翻译： 将衬底暴露于由含有杂质的气体产生的等离子体，从而用杂质掺杂衬底的表面部分，从而形成杂质区域。 使用预定的等离子体掺杂时间，其包括在等离子体在衬底上的沉积速率大于0nm / min且小于或等于5nm / min的时间范围内。
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公开(公告)号：US20080308871A1
公开(公告)日：2008-12-18
申请号：US12168686
申请日：2008-07-07
IPC分类号： H01L29/78
CPC分类号： H01L29/785 , H01L29/66803 , H01L29/78621
摘要： A semiconductor region having an upper surface and a side surface is formed on a substrate. A first impurity region is formed in an upper portion of the semiconductor region. A second impurity region is formed in a side portion of the semiconductor region. The resistivity of the second impurity region is substantially equal to or smaller than that of the first impurity region.
摘要翻译： 在基板上形成具有上表面和侧面的半导体区域。 第一杂质区形成在半导体区域的上部。 第二杂质区域形成在半导体区域的侧部。 第二杂质区的电阻率基本上等于或小于第一杂质区的电阻率。
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