公开(公告)号：US08890790B2

公开(公告)日：2014-11-18

申请号：US13316572

申请日：2011-12-12

申请人： Chih-Ying Lin ,  Chun-Hsin Liu ,  Kuo-Chang Su ,  Yung-Chih Chen

发明人： Chih-Ying Lin ,  Chun-Hsin Liu ,  Kuo-Chang Su ,  Yung-Chih Chen

IPC分类号： G09G3/36 ,  G02F1/1362

CPC分类号： G09G3/3688 ,  G02F1/13624

摘要： A liquid crystal display device includes a plurality of pixel driving circuits and a pixel array. Each pixel driving circuit of the plurality of pixel driving circuits includes four thin film transistors and has four output terminals, where each thin film transistor is used for driving an output terminal of the four output terminals, and the four output terminals are coupled to two gate lines and two sharing lines respectively for outputting two main output signals and two sharing output signals. The phases and timings of the two main output signals and the two sharing output signals are all the same. A pixel of the pixel array is charged/discharged to a specific voltage level according to a main output signal of the two main output signals, a sharing output signal, and a signal of a data line.

摘要翻译： 液晶显示装置包括多个像素驱动电路和像素阵列。 多个像素驱动电路的每个像素驱动电路包括四个薄膜晶体管，并且具有四个输出端子，其中每个薄膜晶体管用于驱动四个输出端子的输出端子，并且四个输出端子耦合到两个栅极 线路和两条共用线路分别输出两路主输出信号和两路共享输出信号。 两个主输出信号和两个共享输出信号的相位和时序都相同。 像素阵列的像素根据两个主输出信号的主输出信号，共享输出信号和数据线的信号而被充/放电到特定电压电平。

公开(公告)号：US08537094B2

公开(公告)日：2013-09-17

申请号：US12730576

申请日：2010-03-24

申请人： Yu-Chung Yang ,  Yung-Chih Chen ,  Chih-Ying Lin ,  Kuo-Hua Hsu

发明人： Yu-Chung Yang ,  Yung-Chih Chen ,  Chih-Ying Lin ,  Kuo-Hua Hsu

IPC分类号： G09G3/36 ,  G11C19/00

CPC分类号： G11C19/28 ,  G09G3/3677 ,  G09G2300/0408

摘要： A shift register comprises a plurality of stages. In one embodiment, each stage includes a first output, a second output, a pull-up circuit electrically coupled between a node and the second output, a pull-up control circuit electrically coupled to the node, a pull-down control circuit electrically coupled between the node and the first output, and a control circuit electrically coupled to the node and the first output.

摘要翻译： 移位寄存器包括多个级。 在一个实施例中，每个级包括第一输出，第二输出，电耦合在节点和第二输出之间的上拉电路，电耦合到该节点的上拉控制电路，电耦合的下拉控制电路 在所述节点和所述第一输出之间，以及控制电路，电连接到所述节点和所述第一输出。

公开(公告)号：US20110234577A1

公开(公告)日：2011-09-29

申请号：US12730576

申请日：2010-03-24

申请人： Yu-Chung Yang ,  Yung-Chih Chen ,  Chih-Ying Lin ,  Kuo-Hua Hsu

发明人： Yu-Chung Yang ,  Yung-Chih Chen ,  Chih-Ying Lin ,  Kuo-Hua Hsu

IPC分类号： G06F3/038 ,  G11C19/00

CPC分类号： G11C19/28 ,  G09G3/3677 ,  G09G2300/0408

摘要： A shift register comprises a plurality of stages. In one embodiment, each stage includes a first output, a second output, a pull-up circuit electrically coupled between a node and the second output, a pull-up control circuit electrically coupled to the node, a pull-down control circuit electrically coupled between the node and the first output, and a control circuit electrically coupled to the node and the first output.

摘要翻译： 移位寄存器包括多个级。 在一个实施例中，每个级包括第一输出，第二输出，电耦合在节点和第二输出之间的上拉电路，电耦合到该节点的上拉控制电路，电耦合的下拉控制电路 在所述节点和所述第一输出之间，以及控制电路，电连接到所述节点和所述第一输出。

公开(公告)号：US08515000B2

公开(公告)日：2013-08-20

申请号：US13044773

申请日：2011-03-10

申请人： Yu-Chung Yang ,  Yung-Chih Chen ,  Chih-Ying Lin ,  Kun-Yueh Lin

发明人： Yu-Chung Yang ,  Yung-Chih Chen ,  Chih-Ying Lin ,  Kun-Yueh Lin

IPC分类号： G11C19/00

CPC分类号： G11C19/28 ,  G09G3/3674 ,  G09G3/3685 ,  G09G2300/0417 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2330/021 ,  G11C19/287

摘要： A shift register circuit includes a plurality of shift registers. Each of the shift registers is configured for outputting a corresponding start-pulse signal and a corresponding driving-pulse signal. Each of the shift registers includes a pull-up circuit, a first driving circuit, a second driving circuit and a discharging circuit. The pull-up circuit is configured for charging a first node. The first driving circuit is configured for generating the corresponding start-pulse signal, and the second driving circuit is configured for generating the corresponding driving-pulse signal. The discharging circuit firstly discharges the first node before discharging an output terminal of the second driving circuit.

摘要翻译： 移位寄存器电路包括多个移位寄存器。 每个移位寄存器被配置为输出相应的起始脉冲信号和相应的驱动脉冲信号。 每个移位寄存器包括上拉电路，第一驱动电路，第二驱动电路和放电电路。 上拉电路被配置为对第一节点进行充电。 第一驱动电路被配置为产生相应的起始脉冲信号，并且第二驱动电路被配置为产生相应的驱动脉冲信号。 在放电第二驱动电路的输出端子之前，放电电路首先对第一节点进行放电。

公开(公告)号：US08098792B2

公开(公告)日：2012-01-17

申请号：US12790854

申请日：2010-05-31

申请人： Kuo-Hua Hsu ,  Chun-Hsin Liu ,  Yung-Chih Chen ,  Chih-Ying Lin

发明人： Kuo-Hua Hsu ,  Chun-Hsin Liu ,  Yung-Chih Chen ,  Chih-Ying Lin

IPC分类号： G11C19/00

CPC分类号： G11C19/184 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2320/043 ,  G11C19/28

摘要： A shift register circuit with waveform-shaping function includes plural shift register stages. Each shift register stage includes a first input unit, a pull-up unit, a pull-down circuit, a second input unit, a control unit and a waveform-shaping unit. The first input unit is utilized for outputting a first driving control voltage in response to a first gate signal. The pull-up unit pulls up a second gate signal in response to the first driving control voltage. The pull-down circuit is employed to pull down the first driving control voltage and the second gate signal. The second input unit is utilized for outputting a second driving control voltage in response to the first gate signal. The control unit provides a control signal in response to the second driving control voltage and an auxiliary signal. The waveform-shaping unit performs a waveform-shaping operation on the second gate signal in response to the control signal.

公开(公告)号：US20110158377A1

公开(公告)日：2011-06-30

申请号：US12790854

申请日：2010-05-31

申请人： Kuo-Hua Hsu ,  Chun-Hsin Liu ,  Yung-Chih Chen ,  Chih-Ying Lin

发明人： Kuo-Hua Hsu ,  Chun-Hsin Liu ,  Yung-Chih Chen ,  Chih-Ying Lin

IPC分类号： G11C19/00

CPC分类号： G11C19/184 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2320/043 ,  G11C19/28

摘要： A shift register circuit with waveform-shaping function includes plural shift register stages. Each shift register stage includes a first input unit, a pull-up unit, a pull-down circuit, a second input unit, a control unit and a waveform-shaping unit. The first input unit is utilized for outputting a first driving control voltage in response to a first gate signal. The pull-up unit pulls up a second gate signal in response to the first driving control voltage. The pull-down circuit is employed to pull down the first driving control voltage and the second gate signal. The second input unit is utilized for outputting a second driving control voltage in response to the first gate signal. The control unit provides a control signal in response to the second driving control voltage and an auxiliary signal. The waveform-shaping unit performs a waveform-shaping operation on the second gate signal in response to the control signal.

公开(公告)号：US08363777B2

公开(公告)日：2013-01-29

申请号：US13604632

申请日：2012-09-06

申请人： Chih-Ying Lin ,  Kun-Yueh Lin ,  Yu-Chung Yang ,  Kuo-Hua Hsu

发明人： Chih-Ying Lin ,  Kun-Yueh Lin ,  Yu-Chung Yang ,  Kuo-Hua Hsu

IPC分类号： G11C19/00

CPC分类号： G11C19/28 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2330/021 ,  G11C19/00

摘要： A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes a pull-up unit, a pull-up control unit, an input unit, a first pull-down unit, a second pull-down unit, and a pull-down control unit. The pull-up control unit generates a first control signal according to a driving control voltage and a first clock. The pull-up unit pulls up a corresponding gate signal according to the first control signal. The input unit is utilized for inputting the gate signal of a preceding shift register stage to become the driving control voltage according to a second clock having a phase opposite to the first clock. The pull-down control unit generates a second control signal according to the driving control voltage. The first and second pull-down units pull down the corresponding gate signal and the first control signal respectively according to the second control signal.

摘要翻译： 移位寄存器电路包括用于提供多个门信号的多个移位寄存器级。 每个移位寄存器级包括上拉单元，上拉控制单元，输入单元，第一下拉单元，第二下拉单元和下拉控制单元。 上拉控制单元根据驱动控制电压和第一时钟产生第一控制信号。 上拉单元根据第一控制信号上拉相应的门信号。 输入单元用于根据具有与第一时钟相反的相位的第二时钟输入前一移位寄存器级的门信号以变为驱动控制电压。 下拉控制单元根据驱动控制电压产生第二控制信号。 第一和第二下拉单元根据第二控制信号分别下拉对应的门信号和第一控制信号。

公开(公告)号：US08284891B2

公开(公告)日：2012-10-09

申请号：US13468047

申请日：2012-05-10

申请人： Chih-Ying Lin ,  Kun-Yueh Lin ,  Yu-Chung Yang ,  Kuo-Hua Hsu

发明人： Chih-Ying Lin ,  Kun-Yueh Lin ,  Yu-Chung Yang ,  Kuo-Hua Hsu

IPC分类号： G11C19/00

CPC分类号： G11C19/28 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2330/021 ,  G11C19/00

摘要： A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes a pull-up unit, a pull-up control unit, an input unit, a first pull-down unit, a second pull-down unit, and a pull-down control unit. The pull-up control unit generates a first control signal according to a driving control voltage and a first clock. The pull-up unit pulls up a corresponding gate signal according to the first control signal. The input unit is utilized for inputting the gate signal of a preceding shift register stage to become the driving control voltage according to a second clock having a phase opposite to the first clock. The pull-down control unit generates a second control signal according to the driving control voltage. The first and second pull-down units pull down the corresponding gate signal and the first control signal respectively according to the second control signal.

公开(公告)号：US20120219105A1

公开(公告)日：2012-08-30

申请号：US13468047

申请日：2012-05-10

申请人： Chih-Ying Lin ,  Kun-Yueh Lin ,  Yu-Chung Yang ,  Kuo-Hua Hsu

发明人： Chih-Ying Lin ,  Kun-Yueh Lin ,  Yu-Chung Yang ,  Kuo-Hua Hsu

IPC分类号： G11C19/36 ,  G11C19/00

CPC分类号： G11C19/28 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2330/021 ,  G11C19/00

摘要： A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes a pull-up unit, a pull-up control unit, an input unit, a first pull-down unit, a second pull-down unit, and a pull-down control unit. The pull-up control unit generates a first control signal according to a driving control voltage and a first clock. The pull-up unit pulls up a corresponding gate signal according to the first control signal. The input unit is utilized for inputting the gate signal of a preceding shift register stage to become the driving control voltage according to a second clock having a phase opposite to the first clock. The pull-down control unit generates a second control signal according to the driving control voltage. The first and second pull-down units pull down the corresponding gate signal and the first control signal respectively according to the second control signal.

摘要翻译： 移位寄存器电路包括用于提供多个门信号的多个移位寄存器级。 每个移位寄存器级包括上拉单元，上拉控制单元，输入单元，第一下拉单元，第二下拉单元和下拉控制单元。 上拉控制单元根据驱动控制电压和第一时钟产生第一控制信号。 上拉单元根据第一控制信号上拉相应的门信号。 输入单元用于根据具有与第一时钟相反的相位的第二时钟输入前一移位寄存器级的门信号以变为驱动控制电压。 下拉控制单元根据驱动控制电压产生第二控制信号。 第一和第二下拉单元根据第二控制信号分别下拉对应的门信号和第一控制信号。

公开(公告)号：US20110142192A1

公开(公告)日：2011-06-16

申请号：US12959378

申请日：2010-12-03

申请人： Chih-Ying Lin ,  Kun-Yueh Lin ,  Yu-Chung Yang ,  Kuo-Hua Hsu

发明人： Chih-Ying Lin ,  Kun-Yueh Lin ,  Yu-Chung Yang ,  Kuo-Hua Hsu

IPC分类号： G11C19/00

CPC分类号： G11C19/28 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2330/021 ,  G11C19/00

摘要： A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes a pull-up unit, a pull-up control unit, an input unit, a first pull-down unit, a second pull-down unit, and a pull-down control unit. The pull-up control unit generates a first control signal according to a driving control voltage and a first clock. The pull-up unit pulls up a corresponding gate signal according to the first control signal. The input unit is utilized for inputting the gate signal of a preceding shift register stage to become the driving control voltage according to a second clock having a phase opposite to the first clock. The pull-down control unit generates a second control signal according to the driving control voltage. The first and second pull-down units pull down the corresponding gate signal and the first control signal respectively according to the second control signal.

摘要翻译： 移位寄存器电路包括用于提供多个门信号的多个移位寄存器级。 每个移位寄存器级包括上拉单元，上拉控制单元，输入单元，第一下拉单元，第二下拉单元和下拉控制单元。 上拉控制单元根据驱动控制电压和第一时钟产生第一控制信号。 上拉单元根据第一控制信号上拉相应的门信号。 输入单元用于根据具有与第一时钟相反的相位的第二时钟输入前一移位寄存器级的门信号以变为驱动控制电压。 下拉控制单元根据驱动控制电压产生第二控制信号。 第一和第二下拉单元根据第二控制信号分别下拉对应的门信号和第一控制信号。