公开(公告)号：US08723772B2

公开(公告)日：2014-05-13

申请号：US13204941

申请日：2011-08-08

申请人： Yu-Chung Yang ,  Kuo-Chang Su ,  Yung-Chih Chen ,  Kuo-Hua Hsu ,  Chih-Ying Lin ,  Kun-Yueh Lin

发明人： Yu-Chung Yang ,  Kuo-Chang Su ,  Yung-Chih Chen ,  Kuo-Hua Hsu ,  Chih-Ying Lin ,  Kun-Yueh Lin

IPC分类号： G09G3/36

CPC分类号： G09G3/3677 ,  G09G3/3614 ,  G09G2300/0426 ,  G09G2310/0205

摘要： A LCD panel with an improved pixel array configuration is provided. The LCD panel uses a column inversion driving method to drive the data lines so as to achieve a stable common voltage. Moreover, by cross-connecting the layout traces of the wiring zone in a specified manner, the gate pulses outputted from every two gate lines neighboring the sub-pixel are not overlapped with each other, so that the frame can be normally displayed.

摘要翻译： 提供了具有改进的像素阵列配置的LCD面板。 LCD面板使用列反转驱动方法驱动数据线，以达到稳定的公共电压。 此外，通过以指定的方式交叉连接布线区的布局迹线，从与子像素相邻的每两个栅极线输出的栅极脉冲彼此不重叠，从而可以正常显示该帧。

公开(公告)号：US08515000B2

公开(公告)日：2013-08-20

申请号：US13044773

申请日：2011-03-10

申请人： Yu-Chung Yang ,  Yung-Chih Chen ,  Chih-Ying Lin ,  Kun-Yueh Lin

发明人： Yu-Chung Yang ,  Yung-Chih Chen ,  Chih-Ying Lin ,  Kun-Yueh Lin

IPC分类号： G11C19/00

CPC分类号： G11C19/28 ,  G09G3/3674 ,  G09G3/3685 ,  G09G2300/0417 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2330/021 ,  G11C19/287

摘要： A shift register circuit includes a plurality of shift registers. Each of the shift registers is configured for outputting a corresponding start-pulse signal and a corresponding driving-pulse signal. Each of the shift registers includes a pull-up circuit, a first driving circuit, a second driving circuit and a discharging circuit. The pull-up circuit is configured for charging a first node. The first driving circuit is configured for generating the corresponding start-pulse signal, and the second driving circuit is configured for generating the corresponding driving-pulse signal. The discharging circuit firstly discharges the first node before discharging an output terminal of the second driving circuit.

摘要翻译： 移位寄存器电路包括多个移位寄存器。 每个移位寄存器被配置为输出相应的起始脉冲信号和相应的驱动脉冲信号。 每个移位寄存器包括上拉电路，第一驱动电路，第二驱动电路和放电电路。 上拉电路被配置为对第一节点进行充电。 第一驱动电路被配置为产生相应的起始脉冲信号，并且第二驱动电路被配置为产生相应的驱动脉冲信号。 在放电第二驱动电路的输出端子之前，放电电路首先对第一节点进行放电。

公开(公告)号：US20120120035A1

公开(公告)日：2012-05-17

申请号：US13204941

申请日：2011-08-08

申请人： Yu-Chung YANG ,  Kuo-Chang Su ,  Yung-Chih Chen ,  Kuo-Hua Hsu ,  Chih-Ying Lin ,  Kun-Yueh Lin

发明人： Yu-Chung YANG ,  Kuo-Chang Su ,  Yung-Chih Chen ,  Kuo-Hua Hsu ,  Chih-Ying Lin ,  Kun-Yueh Lin

IPC分类号： G09G5/00 ,  G09G3/36

CPC分类号： G09G3/3677 ,  G09G3/3614 ,  G09G2300/0426 ,  G09G2310/0205

摘要： A LCD panel with an improved pixel array configuration is provided. The LCD panel uses a column inversion driving method to drive the data lines so as to achieve a stable common voltage. Moreover, by cross-connecting the layout traces of the wiring zone in a specified manner, the gate pulses outputted from every two gate lines neighboring the sub-pixel are not overlapped with each other, so that the frame can be normally displayed.

摘要翻译： 提供了具有改进的像素阵列配置的LCD面板。 LCD面板使用列反转驱动方法驱动数据线，以达到稳定的公共电压。 此外，通过以指定的方式交叉连接布线区的布局迹线，从与子像素相邻的每两个栅极线输出的栅极脉冲彼此不重叠，从而可以正常显示该帧。

公开(公告)号：US08363777B2

公开(公告)日：2013-01-29

申请号：US13604632

申请日：2012-09-06

申请人： Chih-Ying Lin ,  Kun-Yueh Lin ,  Yu-Chung Yang ,  Kuo-Hua Hsu

发明人： Chih-Ying Lin ,  Kun-Yueh Lin ,  Yu-Chung Yang ,  Kuo-Hua Hsu

IPC分类号： G11C19/00

CPC分类号： G11C19/28 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2330/021 ,  G11C19/00

摘要： A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes a pull-up unit, a pull-up control unit, an input unit, a first pull-down unit, a second pull-down unit, and a pull-down control unit. The pull-up control unit generates a first control signal according to a driving control voltage and a first clock. The pull-up unit pulls up a corresponding gate signal according to the first control signal. The input unit is utilized for inputting the gate signal of a preceding shift register stage to become the driving control voltage according to a second clock having a phase opposite to the first clock. The pull-down control unit generates a second control signal according to the driving control voltage. The first and second pull-down units pull down the corresponding gate signal and the first control signal respectively according to the second control signal.

摘要翻译： 移位寄存器电路包括用于提供多个门信号的多个移位寄存器级。 每个移位寄存器级包括上拉单元，上拉控制单元，输入单元，第一下拉单元，第二下拉单元和下拉控制单元。 上拉控制单元根据驱动控制电压和第一时钟产生第一控制信号。 上拉单元根据第一控制信号上拉相应的门信号。 输入单元用于根据具有与第一时钟相反的相位的第二时钟输入前一移位寄存器级的门信号以变为驱动控制电压。 下拉控制单元根据驱动控制电压产生第二控制信号。 第一和第二下拉单元根据第二控制信号分别下拉对应的门信号和第一控制信号。

公开(公告)号：US08284891B2

公开(公告)日：2012-10-09

申请号：US13468047

申请日：2012-05-10

申请人： Chih-Ying Lin ,  Kun-Yueh Lin ,  Yu-Chung Yang ,  Kuo-Hua Hsu

发明人： Chih-Ying Lin ,  Kun-Yueh Lin ,  Yu-Chung Yang ,  Kuo-Hua Hsu

IPC分类号： G11C19/00

CPC分类号： G11C19/28 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2330/021 ,  G11C19/00

摘要： A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes a pull-up unit, a pull-up control unit, an input unit, a first pull-down unit, a second pull-down unit, and a pull-down control unit. The pull-up control unit generates a first control signal according to a driving control voltage and a first clock. The pull-up unit pulls up a corresponding gate signal according to the first control signal. The input unit is utilized for inputting the gate signal of a preceding shift register stage to become the driving control voltage according to a second clock having a phase opposite to the first clock. The pull-down control unit generates a second control signal according to the driving control voltage. The first and second pull-down units pull down the corresponding gate signal and the first control signal respectively according to the second control signal.

公开(公告)号：US20120328070A1

公开(公告)日：2012-12-27

申请号：US13604632

申请日：2012-09-06

申请人： Chih-Ying Lin ,  Kun-Yueh Lin ,  Yu-Chung Yang ,  Kuo-Hua Hsu

发明人： Chih-Ying Lin ,  Kun-Yueh Lin ,  Yu-Chung Yang ,  Kuo-Hua Hsu

IPC分类号： G11C19/28

CPC分类号： G11C19/28 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2330/021 ,  G11C19/00

摘要： A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes a pull-up unit, a pull-up control unit, an input unit, a first pull-down unit, a second pull-down unit, and a pull-down control unit. The pull-up control unit generates a first control signal according to a driving control voltage and a first clock. The pull-up unit pulls up a corresponding gate signal according to the first control signal. The input unit is utilized for inputting the gate signal of a preceding shift register stage to become the driving control voltage according to a second clock having a phase opposite to the first clock. The pull-down control unit generates a second control signal according to the driving control voltage. The first and second pull-down units pull down the corresponding gate signal and the first control signal respectively according to the second control signal.

公开(公告)号：US08204170B2

公开(公告)日：2012-06-19

申请号：US12959378

申请日：2010-12-03

申请人： Chih-Ying Lin ,  Kun-Yueh Lin ,  Yu-Chung Yang ,  Kuo-Hua Hsu

发明人： Chih-Ying Lin ,  Kun-Yueh Lin ,  Yu-Chung Yang ,  Kuo-Hua Hsu

IPC分类号： G11C19/00

CPC分类号： G11C19/28 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2330/021 ,  G11C19/00

摘要： A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes a pull-up unit, a pull-up control unit, an input unit, a first pull-down unit, a second pull-down unit, and a pull-down control unit. The pull-up control unit generates a first control signal according to a driving control voltage and a first clock. The pull-up unit pulls up a corresponding gate signal according to the first control signal. The input unit is utilized for inputting the gate signal of a preceding shift register stage to become the driving control voltage according to a second clock having a phase opposite to the first clock. The pull-down control unit generates a second control signal according to the driving control voltage. The first and second pull-down units pull down the corresponding gate signal and the first control signal respectively according to the second control signal.

摘要翻译： 移位寄存器电路包括用于提供多个门信号的多个移位寄存器级。 每个移位寄存器级包括上拉单元，上拉控制单元，输入单元，第一下拉单元，第二下拉单元和下拉控制单元。 上拉控制单元根据驱动控制电压和第一时钟产生第一控制信号。 上拉单元根据第一控制信号上拉相应的门信号。 输入单元用于根据具有与第一时钟相反的相位的第二时钟输入前一移位寄存器级的门信号以变为驱动控制电压。 下拉控制单元根据驱动控制电压产生第二控制信号。 第一和第二下拉单元根据第二控制信号分别下拉对应的门信号和第一控制信号。

公开(公告)号：US20120219105A1

公开(公告)日：2012-08-30

申请号：US13468047

申请日：2012-05-10

申请人： Chih-Ying Lin ,  Kun-Yueh Lin ,  Yu-Chung Yang ,  Kuo-Hua Hsu

发明人： Chih-Ying Lin ,  Kun-Yueh Lin ,  Yu-Chung Yang ,  Kuo-Hua Hsu

IPC分类号： G11C19/36 ,  G11C19/00

CPC分类号： G11C19/28 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2330/021 ,  G11C19/00

摘要： A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes a pull-up unit, a pull-up control unit, an input unit, a first pull-down unit, a second pull-down unit, and a pull-down control unit. The pull-up control unit generates a first control signal according to a driving control voltage and a first clock. The pull-up unit pulls up a corresponding gate signal according to the first control signal. The input unit is utilized for inputting the gate signal of a preceding shift register stage to become the driving control voltage according to a second clock having a phase opposite to the first clock. The pull-down control unit generates a second control signal according to the driving control voltage. The first and second pull-down units pull down the corresponding gate signal and the first control signal respectively according to the second control signal.

摘要翻译： 移位寄存器电路包括用于提供多个门信号的多个移位寄存器级。 每个移位寄存器级包括上拉单元，上拉控制单元，输入单元，第一下拉单元，第二下拉单元和下拉控制单元。 上拉控制单元根据驱动控制电压和第一时钟产生第一控制信号。 上拉单元根据第一控制信号上拉相应的门信号。 输入单元用于根据具有与第一时钟相反的相位的第二时钟输入前一移位寄存器级的门信号以变为驱动控制电压。 下拉控制单元根据驱动控制电压产生第二控制信号。 第一和第二下拉单元根据第二控制信号分别下拉对应的门信号和第一控制信号。

公开(公告)号：US20110142192A1

公开(公告)日：2011-06-16

申请号：US12959378

申请日：2010-12-03

申请人： Chih-Ying Lin ,  Kun-Yueh Lin ,  Yu-Chung Yang ,  Kuo-Hua Hsu

发明人： Chih-Ying Lin ,  Kun-Yueh Lin ,  Yu-Chung Yang ,  Kuo-Hua Hsu

IPC分类号： G11C19/00

CPC分类号： G11C19/28 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2330/021 ,  G11C19/00

摘要： A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes a pull-up unit, a pull-up control unit, an input unit, a first pull-down unit, a second pull-down unit, and a pull-down control unit. The pull-up control unit generates a first control signal according to a driving control voltage and a first clock. The pull-up unit pulls up a corresponding gate signal according to the first control signal. The input unit is utilized for inputting the gate signal of a preceding shift register stage to become the driving control voltage according to a second clock having a phase opposite to the first clock. The pull-down control unit generates a second control signal according to the driving control voltage. The first and second pull-down units pull down the corresponding gate signal and the first control signal respectively according to the second control signal.

摘要翻译： 移位寄存器电路包括用于提供多个门信号的多个移位寄存器级。 每个移位寄存器级包括上拉单元，上拉控制单元，输入单元，第一下拉单元，第二下拉单元和下拉控制单元。 上拉控制单元根据驱动控制电压和第一时钟产生第一控制信号。 上拉单元根据第一控制信号上拉相应的门信号。 输入单元用于根据具有与第一时钟相反的相位的第二时钟输入前一移位寄存器级的门信号以变为驱动控制电压。 下拉控制单元根据驱动控制电压产生第二控制信号。 第一和第二下拉单元根据第二控制信号分别下拉对应的门信号和第一控制信号。

公开(公告)号：US08411007B2

公开(公告)日：2013-04-02

申请号：US12660315

申请日：2010-02-23

申请人： Yung-Chih Chen ,  Yu-Chung Yang ,  Kun-Yueh Lin ,  Chun-Hsin Liu

发明人： Yung-Chih Chen ,  Yu-Chung Yang ,  Kun-Yueh Lin ,  Chun-Hsin Liu

IPC分类号： G09G3/36

CPC分类号： G09G3/3648 ,  G09G2300/0443 ,  G09G2300/0447 ,  G09G2300/0814 ,  G09G2300/0852 ,  G09G2300/0876 ,  G09G2310/0251 ,  G09G2320/0242 ,  G09G2320/028

摘要： A pixel in a liquid crystal display panel comprises a first sub-pixel area having a first sub-pixel electrode and a second sub-pixel area having a second sub-pixel electrode. Each sub-pixel electrode is associated with a capacitor. When a gate-line signal and a data voltage is provided to the pixel, the voltage level on the first sub-pixel electrode is substantially equal to or slightly higher than the voltage level on the second sub-pixel electrode and the capacitor associated with each sub-pixel electrode is charged. When the gate-line signal has entirely passed on partially passed, a circuit element causes the capacitor associated with the second sub-pixel electrode to transfer its charge to another capacitor, resulting in a reduction of the voltage level on the second sub-pixel electrode.

摘要翻译： 液晶显示面板中的像素包括具有第一子像素电极的第一子像素区域和具有第二子像素电极的第二子像素区域。 每个子像素电极与电容器相关联。 当向像素提供栅极线信号和数据电压时，第一子像素电极上的电压电平基本上等于或略高于第二子像素电极和与每个子像素电极相关联的电容器的电压电平 子像素电极被充电。 当栅极线信号完全通过时，电路元件使与第二子像素电极相关联的电容器将其电荷转移到另一个电容器，导致第二子像素电极上的电压电平降低 。