公开(公告)号：US11606067B2

公开(公告)日：2023-03-14

申请号：US17189141

申请日：2021-03-01

Applicant: pSemi Corporation

Inventor： Miles Sanner ,  Emre Ayranci ,  Parvez Daruwalla

IPC: H03F1/22 ,  H03F3/193 ,  H03F3/21

Abstract: Methods and circuital arrangements for turning OFF branches of a multi-branch cascode amplifier are presented. First and second switching arrangements coupled to a branch allow turning OFF the branch while protecting transistors of the branch from a supply voltage that may be greater than a tolerable voltage of the transistors. The first switching arrangement includes a transistor-based switch that is in series connection with the transistors of the branch. The first switching arrangement drops the supply voltage during the OFF state of the branch and provides a conduction path for a current through the branch during the ON state of the branch. A resistor and a shunting switch are coupled to a gate of the transistor-based switch to reduce parasitic coupling effects of the transistor-based switch upon an RF signal coupled to the branch during the ON state and OFF state of the branch.

公开(公告)号：US11539382B1

公开(公告)日：2022-12-27

申请号：US17505329

申请日：2021-10-19

Applicant: pSemi Corporation

Inventor： Parvez Daruwalla ,  Rong Jiang ,  Sung Kyu Han ,  Khushali Shah

IPC: H04B1/10 ,  H04B1/16 ,  H03F1/08 ,  H03F3/19 ,  H04B1/00 ,  H04B1/04

Abstract: Methods and devices to support multiple frequency bands in radio frequency (RF) circuits are shown. The described methods and devices are based on adjusting the effective width of a transistor in such circuits by selectively disposing matching transistors in parallel with the transistor. The presented devices and methods can be used in RF circuits including low noise amplifiers (LNAs), RF receiver front-ends or any other RF circuits where input matching to wideband inputs is required.

公开(公告)号：US20220216833A1

公开(公告)日：2022-07-07

申请号：US17141726

申请日：2021-01-05

Applicant: pSemi Corporation

Inventor： Rong Jiang ,  Khushali Shah ,  Ravindranath D. Shrivastava ,  Parvez Daruwalla

IPC: H03F1/26 ,  H03F3/72 ,  H03G1/00

Abstract: Circuits and methods for improving the noise figure (NF) of an amplifier, particularly an LNA, in high-gain modes while improving the IIP3 of the amplifier in low-gain modes. The source of an amplifier common-source FET is coupled to circuit ground thorough a degeneration circuit comprising a two-port inductor and a bypass switch coupled in parallel with the inductor. A switched feedback circuit is coupled between the gate of the common-source FET and a feedback node in the amplifier output signal path. During a low gain mode, the inductor is entirely bypassed and the enabled feedback circuit lowers the input impedance of the common-source FET and reduces the gain of the amplifier circuit, essentially eliminating the need for a degeneration inductor. During a high gain mode, the source of the common-source FET is coupled to circuit ground through the inductor and the feedback circuit is disabled. Other gain modes are supported.