Ruggedness protection circuit
    1.
    发明授权

    公开(公告)号:US11239803B2

    公开(公告)日:2022-02-01

    申请号:US16743638

    申请日:2020-01-15

    Abstract: Various methods and circuital arrangements for protection of an RF amplifier are presented. According to one aspect, the RF amplifier is part of switchable RF paths that may include at least one path with one or more attenuators or switches that can be used during normal operation to define different modes of operation of the at least one path. An RF level detector monitors a level of an RF signal during operation of any one of the switchable RF paths and may control the attenuators or switches to provide an attenuation of the RF signal according to a desired level of protection at an input and/or output of the RF amplifier. According to another aspect, the RF level detector may control a switch to force the RF signal through a different switchable RF path.

    Ruggedness protection circuit
    2.
    发明授权

    公开(公告)号:US11159130B2

    公开(公告)日:2021-10-26

    申请号:US16574036

    申请日:2019-09-17

    Abstract: Various methods and circuital arrangements for protection of an RF amplifier are presented. According to one aspect, the RF amplifier is part of switchable RF paths that include at least one path with one or more attenuators that can be used during normal operation to define different modes of operation of the at least one path. An RF level detector monitors a level of an RF signal during operation of any one of the switchable RF paths and forces the RF signal through the at least one path with one or more attenuators while controlling the attenuators to provide an attenuation of the RF signal according to a desired level of protection at an input and/or output of the RF amplifier.

    Amplifier gain-tuning circuits and methods

    公开(公告)号:US11616475B2

    公开(公告)日:2023-03-28

    申请号:US17141726

    申请日:2021-01-05

    Abstract: Circuits and methods for improving the noise figure (NF) of an amplifier, particularly an LNA, in high-gain modes while improving the IIP3 of the amplifier in low-gain modes. The source of an amplifier common-source FET is coupled to circuit ground thorough a degeneration circuit comprising a two-port inductor and a bypass switch coupled in parallel with the inductor. A switched feedback circuit is coupled between the gate of the common-source FET and a feedback node in the amplifier output signal path. During a low gain mode, the inductor is entirely bypassed and the enabled feedback circuit lowers the input impedance of the common-source FET and reduces the gain of the amplifier circuit, essentially eliminating the need for a degeneration inductor. During a high gain mode, the source of the common-source FET is coupled to circuit ground through the inductor and the feedback circuit is disabled. Other gain modes are supported.

    Switchable clamps across attenuators

    公开(公告)号:US11381268B1

    公开(公告)日:2022-07-05

    申请号:US17359084

    申请日:2021-06-25

    Abstract: Methods and devices for limiting the power level of low noise amplifiers (LNA) implemented in radio frequency (RF) receiver front-ends. The described methods are applicable to bypass, low and high gain modes of the LNA. According to the described methods, the decoder allows the signal to be clamped before or after being attenuated. The benefit of such methods is to improve large signal performances (e.g. IIP3, P1dB) of the RF receiver front-end, while still meeting the clamping requirements, or improve (lower) clamped output power, while still meeting large signal performances (e.g. IIP3, P1dB).

    Dual voltage switched branch LNA architecture

    公开(公告)号:US12101065B2

    公开(公告)日:2024-09-24

    申请号:US18492544

    申请日:2023-10-23

    Abstract: Methods and circuital arrangements for turning OFF branches of a multi-branch cascode amplifier are presented. First and second switching arrangements coupled to a branch allow turning OFF the branch while protecting transistors of the branch from a supply voltage that may be greater than a tolerable voltage of the transistors. The first switching arrangement includes a transistor-based switch that is in series connection with the transistors of the branch. The first switching arrangement drops the supply voltage during the OFF state of the branch and provides a conduction path for a current through the branch during the ON state of the branch. A resistor and a shunting switch are coupled to a gate of the transistor-based switch to reduce parasitic coupling effects of the transistor-based switch upon an RF signal coupled to the branch during the ON state and OFF state of the branch.

    Dual voltage switched branch LNA architecture

    公开(公告)号:US11831280B2

    公开(公告)日:2023-11-28

    申请号:US18168346

    申请日:2023-02-13

    Abstract: Methods and circuital arrangements for turning OFF branches of a multi-branch cascode amplifier are presented. First and second switching arrangements coupled to a branch allow turning OFF the branch while protecting transistors of the branch from a supply voltage that may be greater than a tolerable voltage of the transistors. The first switching arrangement includes a transistor-based switch that is in series connection with the transistors of the branch. The first switching arrangement drops the supply voltage during the OFF state of the branch and provides a conduction path for a current through the branch during the ON state of the branch. A resistor and a shunting switch are coupled to a gate of the transistor-based switch to reduce parasitic coupling effects of the transistor-based switch upon an RF signal coupled to the branch during the ON state and OFF state of the branch.

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