FILTER AND FILTERING METHOD
    11.
    发明申请
    FILTER AND FILTERING METHOD 有权
    过滤和过滤方法

    公开(公告)号:US20090189645A1

    公开(公告)日:2009-07-30

    申请号:US12357352

    申请日:2009-01-21

    CPC classification number: H03K5/088 H03K3/02337 H03K5/1252

    Abstract: A filter and a filtering method are provided. The filter includes a first compare voltage generation unit, a second compare voltage generation unit, a comparator and a first inverter. The first compare voltage generation unit generates a first compare voltage according to an input signal. The second compare voltage generation unit generates a second compare voltage. When the first compare voltage is not over the first reference voltage, the second compare voltage equals the first reference voltage. When the first compare voltage is over the first reference voltage, the second compare voltage equals the second reference voltage. The first reference voltage and the second reference voltage depend on a minimum pulse width. The comparator outputs a filtered signal according to the first compare voltage and the second compare voltage. The first inverter inverts a filtered signal to an output signal.

    Abstract translation: 提供了一种滤波器和滤波方法。 滤波器包括第一比较电压产生单元,第二比较电压产生单元,比较器和第一反相器。 第一比较电压产生单元根据输入信号产生第一比较电压。 第二比较电压产生单元产生第二比较电压。 当第一比较电压不超过第一参考电压时,第二比较电压等于第一参考电压。 当第一比较电压超过第一参考电压时,第二比较电压等于第二参考电压。 第一参考电压和第二参考电压取决于最小脉冲宽度。 比较器根据第一比较电压和第二比较电压输出滤波信号。 第一个反相器将滤波后的信号反相到输出信号。

    Phase-difference detecting apparatus and method
    12.
    发明授权
    Phase-difference detecting apparatus and method 有权
    相位差检测装置及方法

    公开(公告)号:US07501861B2

    公开(公告)日:2009-03-10

    申请号:US11898043

    申请日:2007-09-07

    CPC classification number: H03D13/00

    Abstract: A phase-difference detecting method is for detecting phase difference between a first signal and a second signal of the same frequency. First, generate a detection signal. Next, sample the detection signal respectively according to the first signal and the second signal to obtain a first sample value and a second sample value. Then, determine whether a determination condition that the first and the second sample values are respectively equal to the previous first and second sample values is satisfied. When the determination condition is unsatisfied for the first time, record a delay time of the detection signal as a first time. When the determination condition is unsatisfied for the second time, record a delay time of the detection signal as a second time. Obtain the phase difference between the first signal and the second signal according to the first time and the second time.

    Abstract translation: 相位差检测方法用于检测第一信号和相同频率的第二信号之间的相位差。 首先,生成检测信号。 接下来,根据第一信号和第二信号分别对检测信号进行采样,以获得第一采样值和第二采样值。 然后,确定是否满足第一和第二样本值分别等于先前的第一和第二样本值的确定条件。 当第一次不满足确定条件时,首先记录检测信号的延迟时间。 当第二次确定条件不满足时,第二次记录检测信号的延迟时间。 根据第一次和第二次获取第一信号和第二信号之间的相位差。

    Read-only memory and operational control method thereof
    13.
    发明授权
    Read-only memory and operational control method thereof 有权
    只读存储器及其操作控制方法

    公开(公告)号:US07441165B2

    公开(公告)日:2008-10-21

    申请号:US11164586

    申请日:2005-11-29

    CPC classification number: G11C29/40 G11C17/14 G11C2029/0405

    Abstract: A read-only memory (ROM) and a related method for controlling operations of the ROM are disclosed. A built-in self-test (BIST) circuit of the ROM verifies system data stored in a system area of a plurality of memory cells of the ROM according to verification data stored in a verification area of the memory cells of the ROM.

    Abstract translation: 公开了一种用于控制ROM的操作的只读存储器(ROM)和相关方法。 ROM的内置自检(BIST)电路根据存储在ROM的存储单元的验证区域中的验证数据来验证存储在ROM的多个存储单元的系统区域中的系统数据。

    Global positioning system receiver and correlating circuit thereof
    14.
    发明授权
    Global positioning system receiver and correlating circuit thereof 有权
    全球定位系统接收机及其相关电路

    公开(公告)号:US07395155B2

    公开(公告)日:2008-07-01

    申请号:US10979670

    申请日:2004-11-01

    Applicant: Chia-Chang Hsu

    Inventor: Chia-Chang Hsu

    CPC classification number: G01S19/29 G01S19/30

    Abstract: A global positioning System receiver and a correlating circuit thereof are disclosed. They sequentially and in parallel generate the portion of bits of the C/A code representing the satellite, sequentially and in parallel generate the portion of bits of the corrected frequency code of Doppler effect, and sequentially outputs the portion of bits of the C/A code and the corrected frequency code therefrom for multiplying the data and the IF data and for adding the multiplications therefrom for generating the total addition values.

    Abstract translation: 公开了一种全球定位系统接收机及其相关电路。 它们顺序地并且并行地产生表示卫星的C / A码的比特的一部分,并且并行地生成校正的多普勒效应的频率码的比特的一部分,并且顺序地输出C / A的比特的部分 代码及其校正的频率代码,用于对数据和IF数据进行乘法和加法,以产生总加法值。

    Global positioning system receiver and correlating circuit thereof
    15.
    发明授权
    Global positioning system receiver and correlating circuit thereof 有权
    全球定位系统接收机及其相关电路

    公开(公告)号:US07391364B2

    公开(公告)日:2008-06-24

    申请号:US10979342

    申请日:2004-11-01

    Applicant: Chia-Chang Hsu

    Inventor: Chia-Chang Hsu

    CPC classification number: G01S19/29 G01S19/30

    Abstract: A global positioning system receiver and a correlating circuit thereof are disclosed. They sequentially and in parallel generate the portion of bits of the C/A code representing the satellite, sequentially and in parallel generate the portion of bits of the corrected frequency code of Doppler effect, and sequentially outputs the portion of bits of the C/A code and the corrected frequency code therefrom for multiplying the data and the IF data and for adding the products therefrom for generating the total summation value. Therefore, the correlating circuit having portable process is formed. Moreover, an external memory is used to store the sample digital data for reducing costs.

    Abstract translation: 公开了一种全球定位系统接收机及其相关电路。 它们顺序地并且并行地产生表示卫星的C / A码的比特的一部分,并且并行地生成校正的多普勒效应的频率码的比特的一部分,并且顺序地输出C / A的比特的部分 代码及其校正的频率代码,用于乘以数据和IF数据,并用于添加其产品以产生总和值。 因此,形成具有便携处理的相关电路。 此外,外部存储器用于存储样本数字数据以降低成本。

    Method for actuating a system on chip (SOC) and computer system medium thereof
    16.
    发明申请
    Method for actuating a system on chip (SOC) and computer system medium thereof 有权
    用于致动片上系统(SOC)及其计算机系统介质的方法

    公开(公告)号:US20080133966A1

    公开(公告)日:2008-06-05

    申请号:US11892618

    申请日:2007-08-24

    CPC classification number: G06F11/1417

    Abstract: A method for actuating a system on chip (SOC) includes the following steps. First, determine whether the SOC is connected to a computer system via a communication connection. If no, determine whether a non-volatile memory of the SOC has an initial flag signal. If yes, read correction information stored in the non-volatile memory in response to the initial flag signal and set a corresponding first register of the SOC according to the correction information.

    Abstract translation: 用于致动片上系统(SOC)的方法包括以下步骤。 首先,确定SOC是否通过通信连接连接到计算机系统。 如果否,则确定SOC的非易失性存储器是否具有初始标志信号。 如果是,则响应于初始标志信号读取存储在非易失性存储器中的校正信息,并根据校正信息设置SOC的对应的第一寄存器。

    Impedance matching circuit and method
    17.
    发明授权
    Impedance matching circuit and method 有权
    阻抗匹配电路及方法

    公开(公告)号:US07148720B2

    公开(公告)日:2006-12-12

    申请号:US10904926

    申请日:2004-12-06

    Applicant: Yu-Kuo Chen

    Inventor: Yu-Kuo Chen

    CPC classification number: H03H11/30

    Abstract: An impedance matching circuit has comparator, counter, two current sources, semiconductor resistance device, and variable MOS impedance device. The current sources are respectively coupled to an internal impedance device and an external impedance device. The comparator has two input terminals and an output terminal. The input terminals of the comparator are coupled to the internal and external impedance devices. The output terminal of the comparator is coupled to the counter. The variable MOS impedance device is coupled between the counter and the semiconductor impedance, and is controlled by the counter. When the voltages of the internal impedance and the external impedance are not matched, the variable MOS impedance device can provide the compensating impedance by adjusting the counting value of the counter.

    Abstract translation: 阻抗匹配电路具有比较器,计数器,两个电流源,半导体电阻器件和可变MOS阻抗器件。 电流源分别耦合到内部阻抗器件和外部阻抗器件。 比较器有两个输入端子和一个输出端子。 比较器的输入端子耦合到内部和外部阻抗器件。 比较器的输出端与计数器相连。 可变MOS阻抗器件耦合在计数器和半导体阻抗之间,由计数器控制。 当内部阻抗和外部阻抗的电压不匹配时,可变MOS阻抗器件可以通过调整计数器的计数值来提供补偿阻抗。

    Power protection device
    18.
    发明授权
    Power protection device 有权
    电源保护装置

    公开(公告)号:US06956726B2

    公开(公告)日:2005-10-18

    申请号:US10310951

    申请日:2002-12-06

    CPC classification number: H02H3/08 H02H3/16

    Abstract: A power protection device includes a power source switching unit for shutting off the power supply from an AC power source according to an open control signal, a surge voltage protecting unit for outputting the open control signal when a surge voltage occurs, a leakage current protecting unit for outputting the open control signal when a leakage current occurs, and an over-current protecting unit for outputting an open control signal according to a current value when an over-current occurs. The power protection device provides the surge voltage protection, the leakage current protection and the over current protection at the same time.

    Abstract translation: 电源保护装置包括:电源切换单元,用于根据开放控制信号切断来自交流电源的电源;浪涌电压保护单元,用于在发生浪涌电压时输出打开的控制信号;泄漏电流保护单元 用于当发生泄漏电流时输出打开的控制信号;以及过电流保护单元,用于当发生过电流时根据当前值输出打开的控制信号。 电源保护装置同时提供浪涌电压保护,漏电流保护和过流保护。

    Hysteresis circuit used in comparator
    19.
    发明授权
    Hysteresis circuit used in comparator 有权
    迟滞电路用于比较器

    公开(公告)号:US06940329B2

    公开(公告)日:2005-09-06

    申请号:US10821892

    申请日:2004-04-12

    CPC classification number: H03K5/2481

    Abstract: A hysteresis circuit for use in a comparator having a first and a second transistors as an input stage and a constant current source. The hysteresis circuit comprises a first resistor disposed between a source of the first transistor and the constant current source and a second resistor disposed between a source of the second transistor and the constant current source, and comprises a first and a second current generating means. The first current generating means supplies a current to the source of the first transistor and derives a current out from the source of the second transistor if an output signal of the comparator is a first logic value, while the second current generating means supplies a current to the source of the second transistor and derives a current out from the source of the first transistor if the output signal of the comparator is a second logic value.

    Abstract translation: 一种用于具有第一和第二晶体管作为输入级和恒流源的比较器中的滞后电路。 滞后电路包括设置在第一晶体管的源极和恒流源之间的第一电阻器和设置在第二晶体管的源极和恒流源之间的第二电阻器,并且包括第一和第二电流产生装置。 如果比较器的输出信号是第一逻辑值,则第一电流产生装置将电流提供给第一晶体管的源极,并从第二晶体管的源极导出电流,而第二电流产生装置将电流提供给 第二晶体管的源极,并且如果比较器的输出信号是第二逻辑值,则从第一晶体管的源极导出电流。

    BRIDGE DEVICE HAVING DATA MONITORING FUNCTION AND USB TO UART CONVERTER HAVING THE SAME

    公开(公告)号:US20240419621A1

    公开(公告)日:2024-12-19

    申请号:US18672146

    申请日:2024-05-23

    Abstract: A bridge device having data monitoring function is disclosed. The bridge device can be made to be an integrated circuit (IC) chip, so as to be disposed on a circuit board with a USB connector and a UART connector, thereby forming a USB to UART converter. When using the USB to UART converter, the USB connector is connected to a host computer, and the UART connector is connected to an electronic device. As such, the bridge device provides the host computer with at least three virtual COM ports, such that the host computer is able to conduct a data transmission with the electronic device through one virtual COM port. Moreover, during the data transmission, the host computer is also able to hear the transmitted data by way of diverting the transmitted data through the other two virtual COM ports.

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