-
公开(公告)号：US4367494A
公开(公告)日：1983-01-04
申请号：US151101
申请日：1980-05-19
申请人： Kenji Kimura
发明人： Kenji Kimura
CPC分类号： H04N5/953
摘要： In the disclosed recorder-player, an image signal is converted to multi-channel signals and a horizontal synchronizing signal is obtained therefrom by separating a synchronizing signal from the multi-channel signals to operate a flywheel oscillator, and by a loop in each channel in which a time base corrector in each channel operates a sync separator and in response to a coincident output from the sync separator in each channel and an output from the flywheel oscillator.
摘要翻译： 在所公开的记录仪器中，图像信号被转换为多声道信号，并且通过从多声道信号中分离同步信号来获得水平同步信号，以操作飞轮振荡器，并且通过每个通道中的循环 每个通道中的时基校正器操作同步分离器并且响应于来自每个通道中的同步分离器的一致输出和来自飞轮振荡器的输出。
-
公开(公告)号：US3947874A
公开(公告)日：1976-03-30
申请号：US519359
申请日：1974-10-29
申请人： Robert A. Lentz
发明人： Robert A. Lentz
CPC分类号： H04N5/953
摘要： Time base instability of signals in a train thereof is corrected by use of analog shift registers. As employed in the correction of time base instability of video signals, plural analog shift registers are used. The same clock rate is used, respectively, to clock video signals into and out of analog shift registers. The clock rate is set so that samples of a video signal which has a normal duration may load all stages of an analog shift register within the duration of the normal signal. Thus, samples of a stretched signal fully load all stages of the analog shift register, the trailing part of such stretched signal being discarded. Conversely, a video signal which has been compressed, although being fully loaded into the analog shift register, loads less than all of the analog shift register stages.
摘要翻译： 通过使用模拟移位寄存器校正其列车中的信号的时基不稳定性。 如在视频信号的时基不稳定性的校正中使用的，使用多个模拟移位寄存器。 分别使用相同的时钟频率将视频信号输入和输出模拟移位寄存器。 设置时钟速率使得具有正常持续时间的视频信号的样本可以在正常信号的持续时间内加载模拟移位寄存器的所有级。 因此，拉伸信号的样本完全加载模拟移位寄存器的所有级，这种拉伸信号的尾部被丢弃。 相反，已经被压缩的视频信号尽管被完全加载到模拟移位寄存器中，但是比所有的模拟移位寄存器级加载少。
-
公开(公告)号：US3932888A
公开(公告)日：1976-01-13
申请号：US477583
申请日：1974-06-10
CPC分类号： H04N5/953
摘要： Time base instability of signals in a train thereof is corrected by use of analog shift registers. As employed in the correction of time base instability of video signals, plural analog shift registers are used. Two clock rates are used, respectively, to clock video signals into and out of the analog shift registers. The clock-in rate is set so that samples of a video signal which has been stretched a predetermined amount may load all stages of an analog shift register within the duration of the stretched signal. The clock-out rate is set to unload all stages of an analog shift register within the nominal duration of a video signal.
摘要翻译： 通过使用模拟移位寄存器校正其列车中的信号的时基不稳定性。 如在视频信号的时基不稳定性的校正中使用的，使用多个模拟移位寄存器。 分别使用两个时钟速率来将视频信号输入和输出模拟移位寄存器。 设定时钟速率，使得已经被拉伸了预定量的视频信号的样本可以在拉伸信号的持续时间内加载模拟移位寄存器的所有级。 时钟输出速率设置为在视频信号的标称持续时间内卸载模拟移位寄存器的所有级。
-
公开(公告)号：US3748386A
公开(公告)日：1973-07-24
申请号：US3748386D
申请日：1972-04-03
IPC分类号： H04N5/93 , G11B20/02 , H03K5/007 , H04N5/16 , H04N5/18 , H04N5/92 , H04N5/931 , H04N5/95 , H04N5/953 , H04N5/04
摘要： A time-base error correction system for a video signal employing a plurality of serially connected delay lines. Circuit means are conditioned to detect the closest timing match between a reference synchronizing signal and the video signal as it appears at various points along the delay path and to connect the appropriate delay line point or junction to an output at which the correctly delayed video signal appears. Featured circuitry provides for eliminating the erroneous leading edge of a video synchronizing pulse distorted by changes in the selected delay point and for compensating for variations in d.c. offset of the video signal introduced by differential delay line path effects.
摘要翻译： 一种采用多个串行连接的延迟线的视频信号的时基误差校正系统。 电路装置被调节为检测参考同步信号和视频信号之间最接近的定时匹配，因为它在沿着延迟路径的不同点处出现，并且将适当的延迟线点或结点连接到出现正确延迟的视频信号的输出端 。 特色电路提供消除视频同步脉冲的错误前沿，通过所选延迟点的变化而变形，并补偿直流电流的变化。 通过差分延迟线路路径效应引入的视频信号的偏移。
-
公开(公告)号：US5095475A
公开(公告)日：1992-03-10
申请号：US597709
申请日：1990-10-17
申请人： Tokiya Ishikawa
发明人： Tokiya Ishikawa
摘要： An information recorded disk player designed in such a way that spindle servo control is executed on the basis of a sync signal in a video signal while a reading clock for reading memory in a digital demodulation system is synchronized with a reproduced clock, and the low frequency component of a time base error signal is removed from a signal representing the phase difference between these clocks, thereby eliminating the eccentric component and improving the tone quality.
-
16.发明授权
公开(公告)号：US4835755A
公开(公告)日：1989-05-30
申请号：US61362
申请日：1987-06-15
申请人： Satoshi Kusano
发明人： Satoshi Kusano
IPC分类号： G11B7/0037 , G11B7/09 , G11B19/28 , G11B20/22 , H04N5/953
CPC分类号： G11B7/0941 , G11B19/28 , G11B20/225 , G11B7/0037 , G11B7/0908 , H04N5/953
摘要： A recording disk reproducing apparatus employing simplified digital servo control for lower-cost, more stable operational control of the apparatus. At least one of a focusing servo loop, a tracking servo loop, a spindle servo loop, and a time base servo loop employs digital conversion of an analog error signal for processing in a microprocessor. The analog-to-digital conversion circuitry has an input-output characteristic which varies in accordance with error signal level, enabling a reduction in the number of bits of A/D output necessary, and reducing cost.
-
公开(公告)号：US4805021A
公开(公告)日：1989-02-14
申请号：US939385
申请日：1986-12-08
CPC分类号： H03H11/26
摘要： Control circuit for calibrating a delay line for a television receiver. The delay line contains series-connected all-pass sections of at least 2nd-order, the inductances of which are replaced by gyrators to which capacitances are connected. During at least one line of the vertical blanking period, the delay line is included into a phase-lock loop for comparison with a line-frequency signal in order to control the delay time of the all-pass sections.
摘要翻译： 用于校准电视接收机的延迟线的控制电路。 延迟线包含至少二阶的串联全通部分，其电感由与电容连接的旋转器代替。 在垂直消隐周期的至少一行期间，延迟线被包括在锁相环中，用于与线频信号进行比较，以便控制全通部分的延迟时间。
-
公开(公告)号：US4555734A
公开(公告)日：1985-11-26
申请号：US409827
申请日：1982-08-20
申请人： Tsutomu Fukui
发明人： Tsutomu Fukui
IPC分类号： H04N5/93 , G11B3/00 , G11B7/00 , G11B7/004 , G11B20/02 , G11B20/06 , G11B20/22 , H04N5/953 , H04N9/88 , H04N9/893 , H04N5/94 , H04N5/95
CPC分类号： G11B20/225 , G11B20/06 , H04N9/88 , H04N9/893
摘要： An apparatus for reproducing recorded data by detecting data recorded on a rotary recording medium while rotating said rotary recording medium includes a variable delay for delaying a detected data signal, a phase-locked loop for generating a clock signal that controls the variable delay, and a reference signal generator for providing synchronization to a clock signal obtained from said phase-locked loop.
摘要翻译： 一种用于通过检测记录在旋转记录介质上同时旋转所述旋转记录介质的数据来再现记录数据的装置包括用于延迟检测数据信号的可变延迟，用于产生控制可变延迟的时钟信号的锁相环，以及 参考信号发生器，用于提供与从所述锁相环获得的时钟信号的同步。
-
19.发明授权Dual-loop jitter correction circuit for correcting the time base error of an information signal 失效用于校正信息信号的时基误差的双回路抖动校正电路
公开(公告)号：US4468709A
公开(公告)日：1984-08-28
申请号：US302090
申请日：1981-09-14
申请人： Hideyuki Kenjyo
发明人： Hideyuki Kenjyo
CPC分类号： H04N9/893
摘要： In a jitter correction circuit for correcting a time base error caused in a color television signal readout from a video disc due to a fluctuation in a disc rotating speed and an eccentricity of the disc, a first closed loop control circuit includes a first phase difference detector for detecting a first phase deviation of a horizontal synchronizing signal of the color television signal and a first variable time constant lag filter for producing a first control signal in response to the first phase deviation and a second closed loop control circuit includes a second phase difference detector for detecting a second phase deviation of a color burst signal of the color television signal and a second variable time constant lag filter for producing a second control signal in response to the second phase deviation. When the first phase deviation is greater than a predetermined level, only the first control signal is supplied to a voltage controlled oscillator to produce clock pulses for driving a delay device formed by a number of charge coupled devices. When the first phase deviation is reduced to the predetermined level, a sum of the first and second control signals is supplied to the voltage controlled oscillator.
摘要翻译： 在用于校正由于盘旋转速度的波动和盘的偏心引起的从视盘读出的彩色电视信号引起的时基误差的抖动校正电路中，第一闭环控制电路包括第一相位差检测器 用于检测彩色电视信号的水平同步信号的第一相位偏差和用于响应于第一相位偏差产生第一控制信号的第一可变时间常数滞后滤波器，并且第二闭环控制电路包括第二相位差检测器 用于检测彩色电视信号的色同步信号的第二相位偏差和用于响应于第二相位偏差产生第二控制信号的第二可变时间常数滞后滤波器。 当第一相位偏差大于预定电平时，仅将第一控制信号提供给压控振荡器以产生用于驱动由多个电荷耦合器件形成的延迟器件的时钟脉冲。 当第一相位偏差减小到预定电平时，第一和第二控制信号的和被提供给压控振荡器。
-
20.发明授权Method and system for correcting time base errors in broadband signals stored in or transmitted through a plurality of narrow-band channels 失效用于校正存储在多个窄带信道中或通过多个窄带信道发送的宽带信号中的时基误差的方法和系统
公开(公告)号：US4394686A
公开(公告)日：1983-07-19
申请号：US247774
申请日：1981-03-26
申请人： Winfried Horstmann
发明人： Winfried Horstmann
CPC分类号： H04B1/662
摘要： Time base errors arising during the playback of a broadband signal previously stored in segments in a plurality of narrow-band channels with a first time transformation are corrected. Specifically, these signals are read out in turn from the narrow channels on the tape and applied at a slow rate to a plurality of buffer storages. They are read out from the buffer storages at a relatively fast rate, in sequence, so that the broadband signal is reconstituted. The broadband signal is then demodulated. For time base correction, the horizontal synchronization signals are separated from the reconstituted demodulated signal and their timing is compared to the timing of horizontal reference signals. A pulse is formed whose pulse width is equal to the time interval between occurrence of a horizontal synchronization pulse separated from the demodulated signal and the occurrence of the corresponding reference synchronization signal. The output of the clock generator controlling the readout from the buffer storages is delayed by a time interval equal to the pulse width. Further measures for decreasing residual errors are also specified. The measurement is carried on at the start of each line and after the signal has been reconstituted and demodulated and is thus present in a single channel.
摘要翻译： 校正了在先前存储在具有第一时间变换的多个窄带信道中的段中的宽带信号的重放期间产生的时基误差。 具体地说，这些信号依次从磁带上的窄通道读出，并以较慢的速率被应用到多个缓冲存储器。 它们以相对较快的速率依次从缓冲存储器中读出，使得宽带信号被重构。 然后解调宽带信号。 对于时基校正，水平同步信号与重建的解调信号分离，并将它们的定时与水平参考信号的定时进行比较。 形成脉冲，其脉冲宽度等于从解调信号分离出的水平同步脉冲的发生与对应的基准同步信号的出现之间的时间间隔。 控制从缓冲存储器读出的时钟发生器的输出延迟等于脉冲宽度的时间间隔。 还规定了减少残余误差的进一步措施。 测量在每一行开始并在信号被重组和解调之后进行，因此存在于单个通道中。
-
-
-
-
-
-
-
-
-
搜索结果
48 条记录 (耗时 0.011 秒)
